component
AD5262BRUZ20-RL7
Public Made by Adomby adom
Analog Devices Digital Potentiometers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+53@@ -0,0 +1,53 @@+# AD5262BRUZ20-RL7++**Analog Devices** · Digital Potentiometers · TSSOP-16++AD5262BRUZ20-RL7 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SDO | tri_state | Serial data output; open-drain transistor requires external pull-up resistor for daisy-chain operation. |+| 2 | A1 | passive | End A terminal of RDAC 1; voltage range VSS to VDD. |+| 3 | W1 | passive | Wiper (cursor) terminal of RDAC 1 selected when address bit A0 = 0; voltage range VSS to VDD. |+| 4 | B1 | passive | End B terminal of RDAC 1; voltage range VSS to VDD. |+| 5 | VDD | power_in | Positive power supply; rated 5 V or 15 V operation with |VDD| + |VSS| ≤ 15 V. |+| 6 | SHDN | input | Active-low shutdown control input; opens end A and connects wiper W to end B for minimal quiescent current. |+| 7 | CLK | input | Serial clock input, rising-edge triggered; maximum frequency 25 MHz for SPI-compatible interface. |+| 8 | SDI | input | Serial data input; MSB-first 9-bit transfers with address bit A0 followed by 8 data bits for SPI interface. |+| 9 | CS | input | Chip select input, active-low; data latches to target RDAC register on rising edge based on address bit A0. |+| 10 | PR | input | Active-low preset input; forces all RDAC registers to 0x80 to set cursor to midscale position. |+| 11 | GND | power_in | Digital ground reference; connects to PCB common ground for digital circuit return path. |+| 12 | VSS | power_in | Negative power supply; rated 0 V or -5 V operation with |VDD| + |VSS| < 15 V. |+| 13 | VL | power_in | Logic supply voltage; 2.7 V to 5.5 V range; must equal control microcontroller logic voltage level. |+| 14 | B2 | passive | End B terminal of RDAC 2; voltage range VSS to VDD. |+| 15 | W2 | passive | Wiper (cursor) terminal of RDAC 2 selected when address bit A0 = 1; voltage range VSS to VDD. |+| 16 | A2 | passive | End A terminal of RDAC 2; voltage range VSS to VDD. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Analog Devices |+| Package | TSSOP-16 |+| Category | Data Acquisition |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `AD5262BRUZ20-RL7`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `ad5262bruz20-rl7-etched.step` / `ad5262bruz20-rl7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5262bruz20-rl7.step` / `ad5262bruz20-rl7.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886453523136512) (24 pp, sha256 `93e68d0836e617e1`, retrieved 2026-09-18, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ad5262bruz20-rl7-datasheet.pdf)
page.jsonadded+189@@ -0,0 +1,189 @@+{+ "slug": "ad5262bruz20-rl7",+ "version": "0.1.0",+ "type": "component",+ "description": "Analog Devices Digital Potentiometers, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "ad5262bruz20-rl7",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ad5262bruz20-rl7.kicad_sym",+ "ad5262bruz20-rl7.kicad_mod",+ "ad5262bruz20-rl7.glb",+ "ad5262bruz20-rl7.step",+ "ad5262bruz20-rl7.lbr",+ "docs/hero.png",+ "docs/ad5262bruz20-rl7-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "AD5262BRUZ20-RL7",+ "manufacturer": "Analog Devices",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Data Acquisition",+ "subcategory": "Digital Potentiometers",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886453523136512",+ "parts": {+ "symbol": "ad5262bruz20-rl7.kicad_sym",+ "footprint": "ad5262bruz20-rl7.kicad_mod",+ "model_3d": "ad5262bruz20-rl7-etched.glb",+ "model_3d_plain": "ad5262bruz20-rl7.glb",+ "model_3d_step": "ad5262bruz20-rl7-etched.step",+ "model_3d_step_plain": "ad5262bruz20-rl7.step",+ "lbr": "ad5262bruz20-rl7.lbr"+ },+ "distributor_links": {+ "lcsc": "C578157"+ },+ "pins": [+ {+ "number": "1",+ "name": "SDO",+ "type": "tri_state",+ "description": "Serial data output; open-drain transistor requires external pull-up resistor for daisy-chain operation."+ },+ {+ "number": "2",+ "name": "A1",+ "type": "passive",+ "description": "End A terminal of RDAC 1; voltage range VSS to VDD."+ },+ {+ "number": "3",+ "name": "W1",+ "type": "passive",+ "description": "Wiper (cursor) terminal of RDAC 1 selected when address bit A0 = 0; voltage range VSS to VDD."+ },+ {+ "number": "4",+ "name": "B1",+ "type": "passive",+ "description": "End B terminal of RDAC 1; voltage range VSS to VDD."+ },+ {+ "number": "5",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive power supply; rated 5 V or 15 V operation with |VDD| + |VSS| ≤ 15 V."+ },+ {+ "number": "6",+ "name": "SHDN",+ "type": "input",+ "description": "Active-low shutdown control input; opens end A and connects wiper W to end B for minimal quiescent current."+ },+ {+ "number": "7",+ "name": "CLK",+ "type": "input",+ "description": "Serial clock input, rising-edge triggered; maximum frequency 25 MHz for SPI-compatible interface."+ },+ {+ "number": "8",+ "name": "SDI",+ "type": "input",+ "description": "Serial data input; MSB-first 9-bit transfers with address bit A0 followed by 8 data bits for SPI interface."+ },+ {+ "number": "9",+ "name": "CS",+ "type": "input",+ "description": "Chip select input, active-low; data latches to target RDAC register on rising edge based on address bit A0."+ },+ {+ "number": "10",+ "name": "PR",+ "type": "input",+ "description": "Active-low preset input; forces all RDAC registers to 0x80 to set cursor to midscale position."+ },+ {+ "number": "11",+ "name": "GND",+ "type": "power_in",+ "description": "Digital ground reference; connects to PCB common ground for digital circuit return path."+ },+ {+ "number": "12",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative power supply; rated 0 V or -5 V operation with |VDD| + |VSS| < 15 V."+ },+ {+ "number": "13",+ "name": "VL",+ "type": "power_in",+ "description": "Logic supply voltage; 2.7 V to 5.5 V range; must equal control microcontroller logic voltage level."+ },+ {+ "number": "14",+ "name": "B2",+ "type": "passive",+ "description": "End B terminal of RDAC 2; voltage range VSS to VDD."+ },+ {+ "number": "15",+ "name": "W2",+ "type": "passive",+ "description": "Wiper (cursor) terminal of RDAC 2 selected when address bit A0 = 1; voltage range VSS to VDD."+ },+ {+ "number": "16",+ "name": "A2",+ "type": "passive",+ "description": "End A terminal of RDAC 2; voltage range VSS to VDD."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 24,+ "cost_usd": 0.2764,+ "at": "2026-09-18T00:01:43"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886453523136512",+ "pages": 24,+ "sha256": "93e68d0836e617e1",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}