component

AD5262BRUZ20

Public Made by Adom

by adom

Analog Devices Digital Potentiometers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata convertersad5262bruz20factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

AD5262BRUZ20

Analog Devices · Digital Potentiometers · TSSOP-16

AD5262BRUZ20 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SDO output Serial data output; open-drain transistor requires a pull-up resistor.
2 A1 passive A terminal of RDAC 1.
3 W1 passive Wiper terminal of RDAC 1, selected when address bit A0 = 0.
4 B1 passive B terminal of RDAC 1.
5 VDD power_in Positive power supply, specified for operation at 5 V or 15 V with
6 SHDN input Active-low shutdown input that opens terminal A and shuts down the variable resistors.
7 CLK input Serial clock input, positive-edge triggered.
8 SDI input Serial data input.
9 CS input Active-low chip select; when CS returns high, the serial input register data is decoded by address bit A0 and loaded into the target RDAC register.
10 PR input Active-low preset to midscale that loads 0x80 into the RDAC registers.
11 GND power_in Ground reference for the device.
12 VSS power_in Negative power supply, specified for operation at either 0 V or −5 V with
13 VL power_in Logic supply voltage that must be the same voltage as the digital logic controlling the AD5262.
14 B2 passive B terminal of RDAC 2.
15 W2 passive Wiper terminal of RDAC 2, selected when address bit A0 = 1.
16 A2 passive A terminal of RDAC 2.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-16
Category Data Converters
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Resistor Differential Nonlinearity (R-DNL) R-DNL -1 1 LSB RWB, VA = no connect 3
Resistor Nonlinearity (R-INL) R-INL -1 1 LSB RWB, VA = no connect 3
Nominal Resistor Tolerance ΔRAB -30 30 % TA = 25°C 3
Wiper Resistance RW 60 150 Ω IW = 1 V/RAB 3
Channel Resistance Matching (AD5262 only) ΔRWB/RWB 0.1 % Channel 1 and Channel 2 RWB, DX = 0x80 3
Differential Nonlinearity (potentiometer divider) DNL -1 1 LSB 3
Integral Nonlinearity (potentiometer divider) INL -1 1 LSB 3
Full-Scale Error WFSE -2 -1 0 LSB Code = full scale 3
Zero-Scale Error VWZSE 0 1 2 LSB Code = zero scale 3
Input Logic High VIH 2.4 V 3
Input Logic Low VIL 0.8 V 3
Input Logic High (VL = 3 V) VIH 2.1 V VL = 3 V, VSS = 0 V 3
Input Logic Low (VL = 3 V) VIL 0.6 V VL = 3 V, VSS = 0 V 3
Output Logic High (SDO) VOH 4.9 V RPULL-UP = 2 kΩ to 5 V 3
Output Logic Low (SDO) VOL 0.4 V IOL = 1.6 mA, VLOGIC = 5 V 3
Input Current IIL -1 1 μA VIN = 0 V or 5 V 3
Logic Supply Voltage VL 2.7 5.5 V 3
Power Single-Supply Range VDD RANGE 4.5 16.5 V VSS = 0 V 3
Power Dual-Supply Range VDD/SS RANGE 4.5 5.5 V 3
Logic Supply Current IL 60 μA VL = 5 V 3
Positive Supply Current IDD 1 μA VIH = 5 V or VIL = 0 V 3
Negative Supply Current ISS 1 μA VSS = −5 V 3
Power Dissipation PDISS 0.3 mW VIH = 5 V or VIL = 0 V, VDD = +5 V, VSS = -5 V 3
Power Supply Sensitivity PSS 0.003 0.01 %/% ΔVDD= +5 V, ±10% 3
Shutdown Current ISHDN 5 μA Measured at the Ax terminals 3
Common-Mode Leakage Current ICM 1 nA VA = VB = VDD/2 3
Clock Frequency fCLK 25 MHz 4
Input Clock Pulse Width tCH, tCL 20 ns Clock level high or low 4
Data Setup Time tDS 10 ns 4
Data Hold Time tDH 10 ns 4
CLK to SDO Propagation Delay tPD 1 160 ns RL = 1 kΩ, CL< 20 pF 4
CS Setup Time tCSS 5 ns 4
CS High Pulse Width tCSW 20 ns 4
Reset Pulse Width tRS 50 ns 4
CLK Fall to CS Rise Hold Time tCSH 0 ns 4
CS Rise to Clock Rise Setup tCS1 10 ns 4
VDD to GND VDD -0.3 17 V 6
VSS to GND VSS -7 0 V 6
VDD to VSS VDD-VSS 17 V 6
VL to GND VL 0 7 V 6
AX to BX, AX to WX, BX to WX terminal current -20 20 mA Intermittent 6
AX to BX, AX to WX, BX to WX terminal current -5 5 mA Continuous 6
Digital Inputs and Output Voltage to GND -0.3 V Upper limit printed as VL + 0.3 V or +7 V, whichever is less 6
Operating Temperature Range -40 85 °C 6
Maximum Junction Temperature TJ MAX 150 °C 6
Storage Temperature Range -65 150 °C 6
Lead Temperature (Soldering) 300 °C 10 sec 6
Lead Temperature (Vapor Phase) 215 °C 60 sec 6
Lead Temperature (Infrared) 220 °C 15 sec 6
Thermal Resistance, 16-Lead TSSOP θJA 150 °C/W 6
Resistance Temperature Coefficient ΔRAB/ΔT 35 ppm/°C Wiper = no connect 3
Voltage Divider Temperature Coefficient ΔVW/ΔT 5 ppm/°C Code = half scale 3

CAD (KiCad official)

  • Symbol: AD5262BRUZ20
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ad5262bruz20-etched.step / ad5262bruz20-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5262bruz20.step / ad5262bruz20.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (24 pp, sha256 93bd7a53f517e1a0, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF