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AD5252BRUZ10-RL7

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Analog Devices Digital Potentiometers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata convertersad5252bruz10-rl7factory-2.0.0extractor-text

Verified AD5252BRUZ10-RL7

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AD5252BRUZ10-RL7 · TSSOP-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 28-page datasheet
  • ✓distributor: lcsc C209356, digikey 505-AD5252BRUZ10-RL7TR-ND, mouser 584-AD5252BRUZ10-R7
  • ✓family: TSSOP-14_4.4x5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-_lo0fz8r/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ad5252bruz10-rl7.kicad_sym✓ ad5252bruz10-rl7.kicad_mod✓ ad5252bruz10-rl7.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers ad5252bruz10-rl7: viewers · Ray 3d ago
ad5252bruz10-rl7-etched.glb Publish 0.1.0 · Ray 3d ago
ad5252bruz10-rl7-etched.step ad5252bruz10-rl7: factory component page (tier=mfr) · Ray 3d ago
ad5252bruz10-rl7-hero.glb ad5252bruz10-rl7: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
ad5252bruz10-rl7-hero.overlay.json Publish 0.1.0 · Ray 3d ago
ad5252bruz10-rl7.glb Publish 0.1.0 · Ray 3d ago
ad5252bruz10-rl7.kicad_mod Publish 0.1.0 · Ray 3d ago
ad5252bruz10-rl7.kicad_sym Publish 0.1.0 · Ray 3d ago
ad5252bruz10-rl7.lbr Publish 0.1.0 · Ray 3d ago
ad5252bruz10-rl7.step Publish 0.1.0 · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago
verification.json Verified: Published by the parts factory: tier mfr, 14 pins · Ray 3d ago

AD5252BRUZ10-RL7

Analog Devices · Digital Potentiometers · TSSOP-14

AD5252BRUZ10-RL7 from Analog Devices, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive power supply pin; connect +2.7 V to +5 V for single supply or ±2.7 V for dual supply, where VDD - VSS ≤ 5.5 V, and it must be able to source 35 mA for 26 ms when storing data to EEMEM.
2 AD0 input I2C device address bit 0; AD0 and AD1 allow four AD5251/AD5252 devices to be addressed.
3 WP input Write protect, active low; VWP ≤ VDD + 0.3 V.
4 W1 passive Wiper terminal of RDAC1; VSS ≤ VW1 ≤ VDD.
5 B1 passive B terminal of RDAC1; VSS ≤ VB1 ≤ VDD.
6 A1 passive A terminal of RDAC1; VSS ≤ VA1 ≤ VDD.
7 SDA bidirectional Serial data input/output pin that shifts in one bit at a time upon positive clock edges, MSB first; open-drain MOSFET requires a pull-up resistor.
8 VSS power_in Negative supply; connect to 0 V for single supply or -2.7 V for dual supply, where VDD - VSS ≤ +5.5 V, and in dual supply it must be able to sink 35 mA for 26 ms when storing data to EEMEM.
9 SCL input Serial input register clock pin that shifts in one bit at a time upon positive clock edges; VSCL ≤ VDD + 0.3 V, and a pull-up resistor is recommended to ensure minimum power.
10 DGND power_in Digital ground; connect to system analog ground at a single point.
11 AD1 input I2C device address bit 1; AD0 and AD1 allow four AD5251/AD5252 devices to be addressed.
12 A3 passive A terminal of RDAC3; VSS ≤ VA3 ≤ VDD.
13 B3 passive B terminal of RDAC3; VSS ≤ VB3 ≤ VDD.
14 W3 passive Wiper terminal of RDAC3; VSS ≤ VW3 ≤ VDD.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-14
Category Data Converters
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Resistor Differential Nonlinearity R-DNL -1 0.25 1 LSB RWB, RWA = NC, AD5252 5
Resistor Nonlinearity R-INL -2.5 1 2.5 LSB RWB, RWA = NC, AD5252 5
Nominal Resistor Tolerance ΔRAB/RAB -20 20 % TA = 25°C 5
Wiper Resistance RW 75 130 Ω IW = 1 V/R, VDD = 5 V 5
Wiper Resistance RW 200 300 Ω IW = 1 V/R, VDD = 3 V 5
Differential Nonlinearity DNL -1 0.3 1 LSB AD5252 5
Integral Nonlinearity INL -1.5 0.5 1.5 LSB AD5252 5
Full-Scale Error VWFSE -3 -1 0 LSB Code = full scale, AD5252 5
Zero-Scale Error VWZSE 0 1.2 3 LSB Code = zero scale, AD5252 5
Common-Mode Leakage Current ICM 0.01 1 µA VA = VB = VDD/2 5
Input Logic High VIH 2.4 V VDD = 5 V, VSS = 0 V 5
Input Logic High VIH 2.1 V VDD/VSS = +2.7 V/0 V or VDD/VSS = ±2.5 V 5
Input Logic Low VIL 0.8 V VDD = 5 V, VSS = 0 V 5
Input Logic Low VIL 0.6 V VDD/VSS = +2.7 V/0 V or VDD/VSS = ±2.5 V 5
Output Logic High (SDA) VOH 4.9 V RPULL-UP = 2.2 kΩ to VDD = 5 V, VSS = 0 V 5
Output Logic Low (SDA) VOL 0.4 V RPULL-UP = 2.2 kΩ to VDD = 5 V, VSS = 0 V 5
WP Leakage Current IWP 8 µA WP = VDD 5
A0 Leakage Current IA0 3 µA A0 = GND 5
Input Leakage Current (Other than WP and A0) II -1 1 µA VIN = 0 V or VDD 5
Single-Supply Power Range VDD 2.7 5.5 V VSS = 0 V 5
Dual-Supply Power Range VDD/VSS -2.25 2.75 V printed ±2.25 to ±2.75 5
Positive Supply Current IDD 5 15 µA VIH = VDD or VIL = GND 5
Negative Supply Current ISS -5 -15 µA VIH = VDD or VIL = GND, VDD = 2.5 V, VSS = −2.5 V 5
EEMEM Data Storing Mode Current IDD_STORE 35 mA VIH = VDD or VIL = GND, TA = 0°C to 105°C 5
EEMEM Data Restoring Mode Current IDD_RESTORE 2.5 mA VIH = VDD or VIL = GND, TA = 0°C to 105°C 5
Power Supply Sensitivity PSS -0.005 0.002 0.005 %/% ΔVDD = 5 V ± 10% 6
Power Supply Sensitivity PSS -0.01 0.002 0.01 %/% ΔVDD = 3 V ± 10% 6
VDD to GND VDD -0.3 7 V TA = 25°C 8
VSS to GND VSS -7 0.3 V TA = 25°C 8
VDD to VSS VDD-VSS 7 V TA = 25°C 8
IWB, IWA Pulsed -20 20 mA 8
IAB Continuous IAB -500 500 µA RAB = 10 kΩ 8
Digital Inputs and Output Voltage to GND 0 7 V 8
Operating Temperature Range -40 105 °C 8
Maximum Junction Temperature TJMAX 150 °C 8
Storage Temperature Range -65 150 °C 8
Lead Temperature (Soldering, 10 sec) 300 °C 8
SCL Clock Frequency fSCL 400 kHz 6
Bus-Free Time Between Stop and Start t1 1.3 µs 6
Hold Time (Repeated Start) t2 0.6 µs After this period, the first clock pulse is generated. 6
Low Period of SCL Clock t3 1.3 µs 6
High Period of SCL Clock t4 0.6 µs 6
Set-up Time for Start Condition t5 0.6 µs 6
Junction-to-Ambient Thermal Resistance θJA 126.8 °C/W 14-Lead TSSOP 8
Junction-to-Board Thermal Resistance θJB 64.6 °C/W 14-Lead TSSOP 8
Resistance Temperature Coefficient (ΔRAB/RAB)×10^6/ΔT 650 ppm/°C 5
Channel-Resistance Matching ΔRAB1/ΔRAB2 0.15 % RAB = 10 kΩ, 50 kΩ 5
Voltage Divider Temperature Coefficient (ΔVW/VW)×10^6/ΔT 15 ppm/°C Code = half scale 5
Capacitance A, B CA, CB 85 pF f = 1 kHz, measured to GND, code = half scale 5
Capacitance W CW 95 pF f = 1 kHz, measured to GND, code = half scale 5
Input Capacitance CI 5 pF 5
Power Dissipation PDISS 0.075 mW VIH = VDD = 5 V or VIL = GND 6
-3 dB Bandwidth BW 400 kHz RAB = 10 kΩ 6
Total Harmonic Distortion THDW 0.05 % VA = 1 V rms, VB = 0 V, f = 1 kHz 6
VW Settling Time tS 1.5 µs VA = VDD, VB = 0 V, RAB = 10 kΩ 6
Resistor Noise Voltage eN_WB 9 nV/√Hz RAB = 10 kΩ, code = midscale, f = 1 kHz (thermal noise only) 6
Digital Crosstalk CT -80 dB VA = VDD, VB = 0 V, measure VW with adjacent RDAC making full-scale change 6
Analog Coupling CAT -72 dB Signal input at A1 and measure output at W3, f = 1 kHz 6

CAD (KiCad official)

  • Symbol: AD5252BRUZ10-RL7
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: ad5252bruz10-rl7-etched.step / ad5252bruz10-rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5252bruz10-rl7.step / ad5252bruz10-rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (28 pp, sha256 5264e94822a7ec07, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF