component
AD5248BRMZ2.5
Public Made by Adomby adom
Analog Devices Digital Potentiometers, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AD5248BRMZ2.5
Analog Devices · Digital Potentiometers · MSOP-10
AD5248BRMZ2.5 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B1 | passive | B1 is resistor terminal B of RDAC 1, with terminal voltages limited to the GND to VDD range. |
| 2 | AD0 | input | AD0 is programmable address bit 0 for multiple package decoding on the AD5248. |
| 3 | W2 | passive | W2 is the wiper terminal of RDAC 2, with terminal voltages limited to the GND to VDD range. |
| 4 | GND | power_in | GND is the digital ground for the device. |
| 5 | VDD | power_in | VDD is the positive power supply, specified from 2.7 V to 5.5 V. |
| 6 | SCL | input | SCL is the I2C serial clock input, positive-edge triggered. |
| 7 | SDA | bidirectional | SDA is the I2C serial data input/output. |
| 8 | AD1 | input | AD1 is programmable address bit 1 for multiple package decoding on the AD5248. |
| 9 | B2 | passive | B2 is resistor terminal B of RDAC 2, with terminal voltages limited to the GND to VDD range. |
| 10 | W1 | passive | W1 is the wiper terminal of RDAC 1, with terminal voltages limited to the GND to VDD range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | ADC/DAC/Data Conversion |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| End-to-end resistance | RAB | 2.5 | kΩ | 3 | |||
| Nominal Resistor Tolerance | ∆RAB | -20 | 55 | % | TA = 25°C | 3 | |
| Resistance Temperature Coefficient | (∆RAB/RAB)/∆T | 35 | ppm/°C | VAB = VDD, wiper = no connect | 3 | ||
| Resistor Differential Nonlinearity | R-DNL | -2 | 0.1 | 2 | LSB | RWB, VA = no connect | 3 |
| Resistor Integral Nonlinearity | R-INL | -14 | 2 | 14 | LSB | RWB, VA = no connect | 3 |
| Wiper Resistance | RWB | 160 | 200 | Ω | Code = 0x00, VDD = 5 V | 3 | |
| Differential Nonlinearity | DNL | -1.5 | 0.1 | 1.5 | LSB | 3 | |
| Integral Nonlinearity | INL | -2 | 0.6 | 2 | LSB | 3 | |
| Voltage Divider Temperature Coefficient | (∆VW/VW)/∆T | 15 | ppm/°C | Code = 0x80 | 3 | ||
| Full-Scale Error | VWFSE | -14 | -5.5 | 0 | LSB | Code = 0xFF | 3 |
| Zero-Scale Error | VWZSE | 0 | 4.5 | 12 | LSB | Code = 0x00 | 3 |
| Shutdown Supply Current | IA_SD | 0.01 | 1 | µA | VDD = 5.5 V | 3 | |
| Input Logic High | VIH | 2.4 | V | VDD = 5 V | 3 | ||
| Input Logic Low | VIL | 0.8 | V | VDD = 5 V | 3 | ||
| Input Logic High | VIH | 2.1 | V | VDD = 3 V | 3 | ||
| Input Logic Low | VIL | 0.6 | V | VDD = 3 V | 3 | ||
| Input Current | IIL | -1 | 1 | µA | VIN = 0 V or 5 V | 3 | |
| Power Supply Range | VDD RANGE | 2.7 | 5.5 | V | 3 | ||
| Supply Current | IDD | 3.5 | 6 | µA | VIH = 5 V or VIL = 0 V | 3 | |
| Power Supply Sensitivity | PSS | -0.08 | 0.02 | 0.08 | %/% | VDD = 5 V ± 10%, code = midscale | 3 |
| SCL Clock Frequency | fSCL | 0 | 400 | kHz | 5 | ||
| Bus-Free Time Between Stop and Start | tBUF | 1.3 | μs | 5 | |||
| Hold Time (Repeated Start) | tHD;STA | 0.6 | μs | After this period, the first clock pulse is generated. | 5 | ||
| Low Period of SCL Clock | tLOW | 1.3 | μs | 5 | |||
| High Period of SCL Clock | tHIGH | 0.6 | μs | 5 | |||
| Setup Time for Repeated Start Condition | tSU;STA | 0.6 | μs | 5 | |||
| Data Hold Time | tHD;DAT | 0.9 | μs | Maximum must be met only if the device does not stretch the low period (tLOW) of the SCL signal. | 5 | ||
| Data Setup Time | tSU;DAT | 100 | ns | 5 | |||
| Fall Time of Both SDA and SCL Signals | tF | 300 | ns | 5 | |||
| Rise Time of Both SDA and SCL Signals | tR | 300 | ns | 5 | |||
| Setup Time for Stop Condition | tSU;STO | 0.6 | μs | 5 | |||
| VDD to GND | VDD | -0.3 | 7 | V | 6 | ||
| Terminal Current, Ax to Bx, Ax to Wx, Bx to Wx (pulsed) | -20 | 20 | mA | Pulsed | 6 | ||
| Terminal Current, Ax to Bx, Ax to Wx, Bx to Wx (continuous) | -5 | 5 | mA | Continuous | 6 | ||
| Digital Inputs and Output Voltage to GND | 0 | 7 | V | 6 | |||
| Operating Temperature Range | TA | -40 | 125 | °C | 6 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 6 | |||
| Storage Temperature | -65 | 150 | °C | 6 | |||
| Lead Temperature (Soldering) | 300 | °C | 10 sec | 6 | |||
| Thermal Resistance, junction to ambient | θJA | 230 | °C/W | 10-Lead MSOP | 6 |
CAD (KiCad official)
- Symbol:
AD5248BRMZ2.5 - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
ad5248brmz2-5-etched.step/ad5248brmz2-5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5248brmz2-5.step/ad5248brmz2-5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (20 pp, sha256
a69aba359135151f, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AD5248BRMZ2.5
**Analog Devices** · Digital Potentiometers · MSOP-10
AD5248BRMZ2.5 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B1 | passive | B1 is resistor terminal B of RDAC 1, with terminal voltages limited to the GND to VDD range. |
| 2 | AD0 | input | AD0 is programmable address bit 0 for multiple package decoding on the AD5248. |
| 3 | W2 | passive | W2 is the wiper terminal of RDAC 2, with terminal voltages limited to the GND to VDD range. |
| 4 | GND | power_in | GND is the digital ground for the device. |
| 5 | VDD | power_in | VDD is the positive power supply, specified from 2.7 V to 5.5 V. |
| 6 | SCL | input | SCL is the I2C serial clock input, positive-edge triggered. |
| 7 | SDA | bidirectional | SDA is the I2C serial data input/output. |
| 8 | AD1 | input | AD1 is programmable address bit 1 for multiple package decoding on the AD5248. |
| 9 | B2 | passive | B2 is resistor terminal B of RDAC 2, with terminal voltages limited to the GND to VDD range. |
| 10 | W1 | passive | W1 is the wiper terminal of RDAC 1, with terminal voltages limited to the GND to VDD range. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | ADC/DAC/Data Conversion |
| Pins | 10 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| End-to-end resistance | RAB | | 2.5 | | kΩ | | 3 |
| Nominal Resistor Tolerance | ∆RAB | -20 | | 55 | % | TA = 25°C | 3 |
| Resistance Temperature Coefficient | (∆RAB/RAB)/∆T | | 35 | | ppm/°C | VAB = VDD, wiper = no connect | 3 |
| Resistor Differential Nonlinearity | R-DNL | -2 | 0.1 | 2 | LSB | RWB, VA = no connect | 3 |
| Resistor Integral Nonlinearity | R-INL | -14 | 2 | 14 | LSB | RWB, VA = no connect | 3 |
| Wiper Resistance | RWB | | 160 | 200 | Ω | Code = 0x00, VDD = 5 V | 3 |
| Differential Nonlinearity | DNL | -1.5 | 0.1 | 1.5 | LSB | | 3 |
| Integral Nonlinearity | INL | -2 | 0.6 | 2 | LSB | | 3 |
| Voltage Divider Temperature Coefficient | (∆VW/VW)/∆T | | 15 | | ppm/°C | Code = 0x80 | 3 |
| Full-Scale Error | VWFSE | -14 | -5.5 | 0 | LSB | Code = 0xFF | 3 |
| Zero-Scale Error | VWZSE | 0 | 4.5 | 12 | LSB | Code = 0x00 | 3 |
| Shutdown Supply Current | IA_SD | | 0.01 | 1 | µA | VDD = 5.5 V | 3 |
| Input Logic High | VIH | 2.4 | | | V | VDD = 5 V | 3 |
| Input Logic Low | VIL | | | 0.8 | V | VDD = 5 V | 3 |
| Input Logic High | VIH | 2.1 | | | V | VDD = 3 V | 3 |
| Input Logic Low | VIL | | | 0.6 | V | VDD = 3 V | 3 |
| Input Current | IIL | -1 | | 1 | µA | VIN = 0 V or 5 V | 3 |
| Power Supply Range | VDD RANGE | 2.7 | | 5.5 | V | | 3 |
| Supply Current | IDD | | 3.5 | 6 | µA | VIH = 5 V or VIL = 0 V | 3 |
| Power Supply Sensitivity | PSS | -0.08 | 0.02 | 0.08 | %/% | VDD = 5 V ± 10%, code = midscale | 3 |
| SCL Clock Frequency | fSCL | 0 | | 400 | kHz | | 5 |
| Bus-Free Time Between Stop and Start | tBUF | 1.3 | | | μs | | 5 |
| Hold Time (Repeated Start) | tHD;STA | 0.6 | | | μs | After this period, the first clock pulse is generated. | 5 |
| Low Period of SCL Clock | tLOW | 1.3 | | | μs | | 5 |
| High Period of SCL Clock | tHIGH | 0.6 | | | μs | | 5 |
| Setup Time for Repeated Start Condition | tSU;STA | 0.6 | | | μs | | 5 |
| Data Hold Time | tHD;DAT | | | 0.9 | μs | Maximum must be met only if the device does not stretch the low period (tLOW) of the SCL signal. | 5 |
| Data Setup Time | tSU;DAT | 100 | | | ns | | 5 |
| Fall Time of Both SDA and SCL Signals | tF | | | 300 | ns | | 5 |
| Rise Time of Both SDA and SCL Signals | tR | | | 300 | ns | | 5 |
| Setup Time for Stop Condition | tSU;STO | 0.6 | | | μs | | 5 |
| VDD to GND | VDD | -0.3 | | 7 | V | | 6 |
| Terminal Current, Ax to Bx, Ax to Wx, Bx to Wx (pulsed) | | -20 | | 20 | mA | Pulsed | 6 |
| Terminal Current, Ax to Bx, Ax to Wx, Bx to Wx (continuous) | | -5 | | 5 | mA | Continuous | 6 |
| Digital Inputs and Output Voltage to GND | | 0 | | 7 | V | | 6 |
| Operating Temperature Range | TA | -40 | | 125 | °C | | 6 |
| Maximum Junction Temperature | TJMAX | | | 150 | °C | | 6 |
| Storage Temperature | | -65 | | 150 | °C | | 6 |
| Lead Temperature (Soldering) | | | | 300 | °C | 10 sec | 6 |
| Thermal Resistance, junction to ambient | θJA | | 230 | | °C/W | 10-Lead MSOP | 6 |
## CAD (KiCad official)
- Symbol: `AD5248BRMZ2.5`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `ad5248brmz2-5-etched.step` / `ad5248brmz2-5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5248brmz2-5.step` / `ad5248brmz2-5.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5243_5248.pdf) (20 pp, sha256 `a69aba359135151f`, retrieved 2026-11-02, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ad5248brmz2-5-datasheet.pdf)