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Ray Publish 0.1.0 5462f28 3d ago

AD5247BKSZ50-RL7

Analog Devices · Pre-ordered Chips · SC-70-6

AD5247BKSZ50-RL7 from Analog Devices, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive power supply; the datasheet specifies a single-supply range of 2.7 V to 5.5 V (page 3).
2 GND power_in Digital ground and B terminal voltage reference; the datasheet lists this pin as both the digital ground and the B termination.
3 SCL input Serial clock input for the I2C interface, positive-edge triggered.
4 SDA bidirectional Serial data input/output for the I2C interface.
5 W passive Terminal W, the wiper terminal of the variable resistor; the datasheet gives no separate pin-level limits.
6 A passive Terminal A, one end terminal of the resistor; the datasheet gives no separate pin-level limits, and terminal voltage is stated as GND to VDD (page 3).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SC-70-6
Category Interface ICs
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Nominal Resistor Tolerance (∆RAB) ∆RAB -20 20 % VA = VDD, wiper (VW) = no connect (footnote 3) 4
Resistor Differential Nonlinearity (R-DNL) R-DNL -1 0.1 1 LSB RWB, VA = no connect 4
Resistor Integral Nonlinearity (R-INL) R-INL -2 0.25 2 LSB RWB, VA = no connect 4
Output Resistance RWB 75 300 Ω RWB Code = 0x00 4
Differential Nonlinearity (potentiometer divider) DNL -1 0.1 1 LSB 4
Integral Nonlinearity (potentiometer divider) INL -1 0.2 1 LSB 4
Full-Scale Error (50 kΩ, 100 kΩ) VWFSE -1 -1 0 LSB Code = 0x7F 4
Zero-Scale Error (50 kΩ, 100 kΩ) VWZSE 0 0.4 1 LSB Code = 0x00 4
Power Supply Range VDD RANGE 2.7 5.5 V 4
Supply Current IDD 3 7 µA VDD = 5.5 V; VIH = VDD or VIL = GND 4
Supply Current IDD 2.5 5.2 µA VDD = 5 V; VIH = VDD or VIL = GND 4
Supply Current IDD 0.9 2 µA VDD = 3.3 V; VIH = VDD or VIL = GND 4
Input Logic High VIH 2.4 V VDD = 5 V 4
Input Logic Low VIL 0.8 V VDD = 5 V 4
Input Logic High VIH 2.1 V VDD = 3 V 4
Input Logic Low VIL 0.6 V VDD = 3 V 4
Input Current IIL -1 1 µA VIN = 0 V or 5 V 4
Output Logic Low (SDA) VOL 0.4 V IOL = 3 mA 4
Output Logic Low (SDA) VOL 0.6 V IOL = 6 mA 4
Power Supply Sensitivity PSSR -0.02 0.01 0.02 %/% VDD = 5 V ± 10%, code = midscale 4
Bandwidth -3 dB (50 kΩ column) BW 100 kHz RAB = 10 kΩ/50 kΩ/100 kΩ, code = 0x40 5
VW Settling Time (10 kΩ/50 kΩ/100 kΩ) tS 2 µs VA = 5 V ±1 LSB error band 5
Resistor Noise Voltage Density eN_WB 9 nV/√Hz RWB = 5 kΩ, RS = 0 5
SCL Clock Frequency fSCL 400 kHz 5
Bus Free Time Between Stop and Start tBUF 1.3 µs 5
Hold Time (Repeated Start) tHD;STA 0.6 µs 5
Low Period of SCL Clock tLOW 1.3 µs 5
High Period of SCL Clock tHIGH 0.6 50 µs 5
Setup Time for Repeated Start Condition tSU;STA 0.6 µs 5
Data Hold Time tHD;DAT 0.9 µs 5
Data Setup Time tSU;DAT 100 ns 5
Fall Time of Both SDA and SCL tF 300 ns 5
Rise Time of Both SDA and SCL tR 300 ns 5
Setup Time for Stop Condition tSU;STO 0.6 µs 5
Operating Temperature Range TA -40 125 °C 6
VDD to GND VDD -0.3 7 V 6
Terminal Current, Ax to Bx, Ax to Wx, Bx to Wx (pulsed) IT -20 20 mA Pulsed 6
Terminal Current, Ax to Bx, Ax to Wx, Bx to Wx (continuous) IT -5 5 mA Continuous 6
Maximum Junction Temperature TJMAX 150 °C 6
Storage Temperature Range TSTG -65 150 °C 6
Reflow Soldering Peak Temperature 240 °C SnPb 6
Reflow Soldering Peak Temperature 260 °C Pb-free 6
Thermal Resistance, junction-to-ambient θJA 340 °C/W SC70-6 package 6
End-to-End Resistance (50 kΩ version) RAB 50 kΩ 1
Resistance Temperature Coefficient ∆RAB/∆T 45 ppm/°C 4
Voltage Divider Temperature Coefficient ∆VW/∆T 15 ppm/°C Code = 0x40 4
Capacitance A CA 45 pF f = 1 MHz, measured to GND, code = 0x40 4
Capacitance W CW 60 pF f = 1 MHz, measured to GND, code = 0x40 4
Input Capacitance CIL 5 pF 4
Common-Mode Leakage ICM 1 nA VA = VDD/2 4
Power Dissipation PDISS 40 µW VIH = 5 V or VIL = 0 V, VDD = 5 V 4

CAD (KiCad official)

  • Symbol: AD5247BKSZ50-RL7
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SC-70-6 (KiCad packages3D, STEP)
  • 3D model files: ad5247bksz50-rl7-etched.step / ad5247bksz50-rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5247bksz50-rl7.step / ad5247bksz50-rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 fbfe1a09b8740b04, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF