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Ray Publish 0.1.0 5275c43 3d ago

AD5245BRJZ5-RL7

Analog Devices · Digital Potentiometers · SOT-23-8

AD5245BRJZ5-RL7 from Analog Devices, in a SOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 W passive W (wiper) terminal; voltage must satisfy GND ≤ VW ≤ VDD.
2 VDD power_in Positive power supply, 2.7 V to 5.5 V operating range.
3 GND power_in Digital ground.
4 SCL input Serial clock input, positive edge triggered; pull-up resistor required.
5 SDA bidirectional Serial data input/output; pull-up resistor required.
6 AD0 input Programmable address bit 0 for two-device decoding.
7 B passive B terminal of the resistor; voltage must satisfy GND ≤ VB ≤ VDD.
8 A passive A terminal of the resistor; voltage must satisfy GND ≤ VA ≤ VDD.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOT-23-8
Category Data Converters
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Resistor Differential Nonlinearity R-DNL -1.5 0.1 1.5 LSB RWB, VA = no connect 3
Resistor Integral Nonlinearity R-INL -4 0.75 4 LSB RWB, VA = no connect 3
Nominal Resistor Tolerance ΔRAB -30 30 % TA = 25°C 3
Resistance Temperature Coefficient (ΔRAB/RAB)/ΔT × 10^6 45 ppm/°C VAB = VDD, wiper = no connect 3
Wiper Resistance RW 50 120 Ω 3
Differential Nonlinearity DNL -1.5 0.1 1.5 LSB Potentiometer divider mode 3
Integral Nonlinearity INL -1.5 0.6 1.5 LSB Potentiometer divider mode 3
Voltage Divider Temperature Coefficient (ΔVW/VW)/ΔT × 10^6 15 ppm/°C Code = midscale 3
Full-Scale Error VWFSE -6 -2.5 0 LSB Code = full scale 3
Zero-Scale Error VWZSE 0 2 6 LSB Code = zero scale 3
Voltage Range VA, VB, VW 0 V Min GND, max VDD 3
Shutdown Supply Current IA_SD 0.01 1 µA VDD = 5.5 V 3
Input Logic High VIH 2.4 V VDD = 5 V 3
Input Logic Low VIL 0.8 V VDD = 5 V 3
Input Logic High VIH 2.1 V VDD = 3 V 3
Input Logic Low VIL 0.6 V VDD = 3 V 3
Input Current IIL 1 µA VIN = 0 V or 5 V (printed ±1) 3
Power Supply Range VDD 2.7 5.5 V 3
Supply Current IDD 3 8 µA VIH = 5 V or VIL = 0 V 3
Power Supply Sensitivity PSS 0.02 0.05 %/% VDD = +5 V ± 10%, code = midscale 3
SCL Clock Frequency fSCL 400 kHz 5
Bus Free Time Between STOP and START t1 1.3 µs 5
Hold Time (Repeated START) t2 0.6 µs After this period, the first clock pulse is generated. 5
Low Period of SCL Clock t3 1.3 µs 5
High Period of SCL Clock t4 0.6 µs 5
Setup Time for Repeated START Condition t5 0.6 µs 6
Data Hold Time t6 0.9 µs 6
Data Setup Time t7 100 ns 6
Fall Time of Both SDA and SCL Signals t8 300 ns 6
Rise Time of Both SDA and SCL Signals t9 300 ns 6
Setup Time for STOP Condition t10 0.6 µs 6
VDD to GND VDD -0.3 7 V TA = 25°C 7
Digital Inputs and Output Voltage to GND 0 7 V TA = 25°C 7
Terminal Current, Pulsed -20 20 mA A to B, A to W, B to W; printed ±20 mA 7
Terminal Current, Continuous -5 5 mA A to B, A to W, B to W; printed ±5 mA 7
Operating Temperature Range -40 125 °C 7
Maximum Junction Temperature TJMAX 150 °C 7
Storage Temperature Range -65 150 °C 7
Lead Temperature (Soldering, 10 sec) 245 °C 7
Thermal Resistance θJA θJA 230 °C/W RJ-8, JEDEC 2S2P test board, still air 7
Capacitance A, B CA, CB 90 pF f = 1 MHz, measured to GND, code = midscale 3
Capacitance W CW 95 pF f = 1 MHz, measured to GND, code = midscale 3
Common-Mode Leakage ICM 1 nA VA = VB = VDD/2 (printed as 1 in typ/max column ambiguous) 3
Input Capacitance CIL 5 pF 3
Power Dissipation PDISS 44 µW VIH = 5 V or VIL = 0 V, VDD = 5 V 3
Bandwidth -3 dB BW_5K 1.2 MHz RAB = 5 kΩ, code = midscale 4
Total Harmonic Distortion THDW 0.1 % VA = 1 V rms, VB = 0 V, f = 1 kHz 4
VW Settling Time tS 1 µs VA = 5 V, VB = 0 V, ±1 LSB error band 4
Resistor Noise Voltage Density eN_WB 6 nV/√Hz RWB = 2.5 kΩ, RS = 0 4

CAD (KiCad official)

  • Symbol: AD5245BRJZ5-RL7
  • Footprint: Package_TO_SOT_SMD:SOT-23-8
  • 3D model: SOT-23-8 (KiCad packages3D, STEP)
  • 3D model files: ad5245brjz5-rl7-etched.step / ad5245brjz5-rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5245brjz5-rl7.step / ad5245brjz5-rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (19 pp, sha256 6ea146f3589ef15b, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF