AD5241BRUZ100 from Analog Devices, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	A1	passive	Resistor Terminal A1.
2	W1	passive	Wiper Terminal W1.
3	B1	passive	Resistor Terminal B1.
4	VDD	power_in	Positive power supply, specified for operation from 2.2 V to 5.5 V.
5	SHDN	input	Active low, asynchronous connection of wiper W to Terminal B and open circuit of Terminal A with RDAC register contents unchanged; tie to VDD if not used.
6	SCL	input	Serial clock input.
7	SDA	bidirectional	Serial data input/output.
8	AD0	input	Programmable address bit for multiple package decoding; AD0 and AD1 provide four possible addresses.
9	AD1	input	Programmable address bit for multiple package decoding; AD0 and AD1 provide four possible addresses.
10	DGND	power_in	Common ground.
11	VSS	power_in	Negative power supply, specified for operation from 0 V to −2.7 V.
12	O2	output	Logic output terminal O2.
13	NC	unconnected	No connect.
14	O1	output	Logic output terminal O1.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	TSSOP-14
Category
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Nominal end-to-end resistance	RAB		100		kΩ	100 kΩ version (AD5241BRUZ100)	3
Nominal Resistor Tolerance	ΔRAB/RAB	-30		50	%	TA = 25°C, RAB = 100 kΩ/1 MΩ	3
Resistance Temperature Coefficient	(ΔRAB/RAB)/ΔT × 10^6		30		ppm/°C	VAB = VDD, wiper = no connect	3
Voltage Divider Temperature Coefficient	(ΔVW/VW)/ΔT × 10^6		5		ppm/°C	Code = 0x80	3
Resolution	N		8		Bits		3
Resistor Differential Nonlinearity	R-DNL	-1	0.4	1	LSB	RWB, VA = no connect	3
Resistor Integral Nonlinearity	R-INL	-2	0.5	2	LSB	RWB, VA = no connect	3
Wiper Resistance	RW		60	120	Ω	IW = VDD/R	3
Differential Nonlinearity	DNL	-1	0.4	1	LSB		3
Integral Nonlinearity	INL	-2	0.5	2	LSB		3
Full-Scale Error	VWFSE	-1	-0.5	0	LSB	Code = 0xFF	3
Zero-Scale Error	VWZSE	0	0.5	1	LSB	Code = 0x00	3
Capacitance (A, B)	CA, CB		45		pF	f = 1 MHz, measured to GND, code = 0x80	3
Capacitance (W)	CW		60		pF	f = 1 MHz, measured to GND, code = 0x80	3
Common-Mode Leakage	ICM			1	nA	VA = VB = VW	3
Input Logic High (AD0 and AD1)	VIH	2.4			V	VDD = 5 V	3
Input Logic Low (AD0 and AD1)	VIL			0.8	V	VDD = 5 V	3
Input Logic High	VIH	2.1			V	VDD = 3 V	3
Input Logic Low	VIL			0.6	V	VDD = 3 V	3
Input Current	IIL			1	µA	VIH = 5 V or VIL = GND	3
Input Capacitance	CIL		3		pF		3
Digital Output Low	VOL			0.4	V	IOL = 3 mA	3
Output Logic Low (SDA)	VOL			0.6	V	IOL = 6 mA	3
Output Logic Low (O1 and O2)	VOL			0.4	V	ISINK = 1.6 mA	3
Output Logic High (O1 and O2)	VOH	4			V	ISOURCE = 40 µA	3
Three-State Leakage Current (SDA)	IOZ	-1		1	µA	VIH = 5 V or VIL = GND	3
Output Capacitance	COZ		3	8	pF		3
Power Single-Supply Range	VDD	2.7		5.5	V	VSS = 0 V	3
Positive Supply Current	IDD		0.1	50	µA	VIH = 5 V or VIL = GND	3
Negative Supply Current	ISS	-50	0.1		µA	VSS = -2.5 V, VDD = +2.5 V	3
Power Dissipation	PDISS		0.5	250	µW	VIH = 5 V or VIL = GND, VDD = 5 V	4
Power Supply Sensitivity	PSS	-0.01	0.002	0.01	%/%		4
-3 dB Bandwidth	BW_100 kΩ		69		kHz	RAB = 100 kΩ, code = 0x80	4
Total Harmonic Distortion	THDW		0.005		%	VA = 1 V rms + 2 V dc, VB = 2 V dc, f = 1 kHz	4
Resistor Noise Voltage	eN_WB		14		nV√Hz	RWB = 5 kΩ, f = 1 kHz	4
SCL Clock Frequency	fSCL	0		400	kHz		4
Bus Free Time Between Stop and Start	t1	1.3			µs		4
Hold Time (Repeated Start)	t2	600			ns	After this period, the first clock pulse is generated	4
Low Period of SCL Clock	t3	1.3			µs		4
High Period of SCL Clock	t4	0.6		50	µs		4
Setup Time for Repeated Start Condition	t5	600			ns		4
Data Hold Time	t6			900	ns		4
Data Setup Time	t7	100			ns		4
Rise Time of Both SDA and SCL Signals	t8			300	ns		4
Fall Time of Both SDA and SCL Signals	t9			300	ns		4
Setup Time for Stop Condition	t10	0.6			µs		4
VDD to GND	VDD	-0.3		7	V	TA = 25°C	6
VSS to GND	VSS	-7		0	V	TA = 25°C	6
VDD to VSS				7	V	TA = 25°C	6
IA, IB, IW current	IA, IB, IW			1.5	mA	RAB = 100 kΩ in TSSOP-14	6
Operating Temperature Range		-40		105	°C		6
Maximum Junction Temperature	TJ max			150	°C		6
Storage Temperature Range		-65		150	°C		6
Lead Temperature, Vapor Phase				215	°C	60 sec	6
Lead Temperature, Infrared				220	°C	15 sec	6
Thermal Resistance	θJA		206		°C/W	14-Lead TSSOP	6

CAD (KiCad official)

Symbol: AD5241BRUZ100
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model files: ad5241bruz100-etched.step / ad5241bruz100-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5241bruz100.step / ad5241bruz100.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (17 pp, sha256 b10cb8d6bde9cac7, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AD5241BRUZ100

Verified AD5241BRUZ100

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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