component
AD5231BRUZ10
Public Made by Adomby adom
Analog Devices Digital Potentiometers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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AD5231BRUZ10
Analog Devices · Digital Potentiometers · TSSOP-16
AD5231BRUZ10 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | O1 | output | Nonvolatile Digital Output 1 at ADDR = 0x1, data bit position D0; to store O1 high the data bit format is 0x310001. |
| 2 | CLK | input | Serial input register clock pin that shifts in one bit at a time on positive clock edges. |
| 3 | SDI | input | Serial data input pin that shifts in one bit at a time on positive CLK edges, MSB loaded first. |
| 4 | SDO | output | Serial data output pin for readback (Commands 9 and 10) and daisy-chain functions, delayed by 24 or 25 clock pulses, and it needs a 1 kΩ to 10 kΩ pull-up resistor. |
| 5 | GND | power_in | Ground pin, logic ground reference. |
| 6 | VSS | power_in | Negative supply, connected to 0 V for single-supply applications; in dual-supply use it must sink 40 mA for 25 ms when storing data to EEMEM. |
| 7 | T | passive | Reserved for factory testing; connect to VDD or VSS. |
| 8 | B | passive | Terminal B of RDAC. |
| 9 | W | passive | Wiper terminal of RDAC, ADDR (RDAC) = 0x0. |
| 10 | A | passive | Terminal A of RDAC. |
| 11 | VDD | power_in | Positive power supply pin. |
| 12 | WP | input | Optional active-low write protect pin that prevents changes to present contents except PR and Instructions 1 and 8; tie to VDD if not used. |
| 13 | PR | input | Optional hardware override preset pin that refreshes the scratchpad register with the EEMEM contents (factory default midscale 512), activated at the logic high transition; tie to VDD if not used. |
| 14 | CS | input | Serial register chip select, active low, with serial register operation taking place when CS returns to logic high. |
| 15 | RDY | output | Ready, active-high open-drain output that identifies completion of Instructions 2, 3, 8, 9, 10, and PR. |
| 16 | O2 | output | Nonvolatile Digital Output 2 at ADDR = 0x1, data bit position D1; to store O2 high the data bit format is 0x310002. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-16 |
| Category | Data Converters |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nominal Resistor Tolerance | ΔRAB/RAB | -40 | 20 | % | D = 0x3FF | 3 | |
| Resistance Temperature Coefficient | (ΔRWB/RWB)/ΔT × 10^6 | 600 | ppm/°C | 3 | |||
| Resistor Differential Nonlinearity | R-DNL | -1 | 0.5 | 1.8 | LSB | RWB, VA = NC, monotonic | 3 |
| Resistor Integral Nonlinearity | R-INL | -0.2 | 0.2 | LSB | RWB, VA = NC | 3 | |
| Wiper Resistance | RW | 15 | 100 | Ω | IW = 100 µA, VDD = 5.5 V, code = half scale | 3 | |
| Wiper Resistance | RW | 50 | Ω | IW = 100 µA, VDD = 3 V, code = half scale | 3 | ||
| Differential Nonlinearity | DNL | -1 | 0.5 | 1 | LSB | Monotonic, TA = 25°C | 3 |
| Differential Nonlinearity | DNL | -1 | 1.25 | LSB | Monotonic, TA = −40°C or +85°C | 3 | |
| Integral Nonlinearity | INL | -0.4 | 0.4 | LSB | 3 | ||
| Voltage Divider Temperature Coefficient | (ΔVW/VW)/ΔT × 10^6 | 15 | ppm/°C | Code = half scale | 3 | ||
| Full-Scale Error | VWFSE | -3 | 0 | % FS | Code = full scale | 3 | |
| Zero-Scale Error | VWZSE | 0 | 1.5 | % FS | Code = zero scale | 3 | |
| Capacitance A, B | CA, B | 50 | pF | f = 1 MHz, measured to GND, code = half-scale | 3 | ||
| Capacitance W | CW | 50 | pF | f = 1 MHz, measured to GND, code = half-scale | 3 | ||
| Common-Mode Leakage Current | ICM | 0.01 | 1 | µA | VW = VDD/2 | 3 | |
| Input Logic High | VIH | 2.4 | V | With respect to GND, VDD = 5 V | 3 | ||
| Input Logic Low | VIL | 0.8 | V | With respect to GND, VDD = 5 V | 3 | ||
| Input Logic High | VIH | 2.1 | V | With respect to GND, VDD = 3 V | 3 | ||
| Input Logic Low | VIL | 0.6 | V | With respect to GND, VDD = 3 V | 3 | ||
| Input Logic High | VIH | 2 | V | With respect to GND, VDD = +2.5 V, VSS = −2.5 V | 3 | ||
| Input Logic Low | VIL | 0.5 | V | With respect to GND, VDD = +2.5 V, VSS = −2.5 V | 3 | ||
| Output Logic High (SDO, RDY) | VOH | 4.9 | V | RPULL-UP = 2.2 kΩ to 5 V (see Figure 26) | 3 | ||
| Output Logic Low | VOL | 0.4 | V | IOL = 1.6 mA, VLOGIC = 5 V (see Figure 26) | 3 | ||
| Input Current | IIL | -2.5 | 2.5 | µA | VIN = 0 V or VDD | 3 | |
| Single-Supply Power Range | VDD | 2.7 | 5.5 | V | VSS = 0 V | 3 | |
| Positive Supply Current | IDD | 2.7 | 10 | µA | VIH = VDD or VIL = GND | 4 | |
| Negative Supply Current | ISS | 0.5 | 10 | µA | VIH = VDD or VIL = GND, VDD = +2.5 V, VSS = −2.5 V | 4 | |
| EEMEM Restore Mode Current | IDD (restore) | 0.3 | 3 | 9 | mA | VIH = VDD or VIL = GND, VSS = GND, ISS ≈ 0 | 4 |
| Power Dissipation | PDISS | 0.018 | 0.05 | mW | VIH = VDD or VIL = GND | 4 | |
| Power Supply Sensitivity | PSS | 0.002 | 0.01 | %/% | ΔVDD = 5 V ± 10% | 4 | |
| Clock Cycle Time | t1 | 20 | ns | 4 | |||
| CS Setup Time | t2 | 10 | ns | 4 | |||
| Input Clock Pulse Width | t4, t5 | 10 | ns | Clock level high or low | 4 | ||
| Data Setup Time | t6 | 5 | ns | From positive CLK transition | 4 | ||
| Data Hold Time | t7 | 5 | ns | From positive CLK transition | 5 | ||
| CLK to SDO Propagation Delay | t10 | 50 | ns | RP = 2.2 kΩ, CL < 20 pF | 5 | ||
| Store/Read EEMEM Time | t16 | 25 | ms | Applies to instructions 0x2, 0x3, and 0x9 | 5 | ||
| Endurance | 100 | kCycles | 5 | ||||
| Data Retention | 100 | Years | 5 | ||||
| VDD to GND | VDD | -0.3 | 7 | V | TA = 25°C | 7 | |
| VSS to GND | VSS | -7 | 0.3 | V | TA = 25°C | 7 | |
| VDD to VSS | 7 | V | TA = 25°C | 7 | |||
| A-B, A-W, B-W Intermittent | -20 | 20 | mA | TA = 25°C | 7 | ||
| A-B, A-W, B-W Continuous | -2 | 2 | mA | TA = 25°C | 7 | ||
| Operating Temperature Range | -40 | 85 | °C | Includes programming of nonvolatile memory | 7 | ||
| Maximum Junction Temperature | TJ max | 150 | °C | 7 | |||
| Storage Temperature | -65 | 150 | °C | 7 | |||
| Thermal Resistance Junction-to-Ambient | θJA | 150 | °C/W | TSSOP-16 | 7 | ||
| Thermal Resistance Junction-to-Case | θJC | 28 | °C/W | TSSOP-16 | 7 | ||
| Total Harmonic Distortion | THDW | 0.045 | % | VA = 1 V rms, VB = 0 V, f = 1 kHz, RAB = 10 kΩ | 4 | ||
| Resistor Noise Voltage | eN_WB | 9 | nV/√Hz | RWB = 5 kΩ, f = 1 kHz | 4 |
CAD (KiCad official)
- Symbol:
AD5231BRUZ10 - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ad5231bruz10-etched.step/ad5231bruz10-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5231bruz10.step/ad5231bruz10.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (27 pp, sha256
26c72727aabb3221, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).