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AD5165BUJZ100-R7
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Analog Devices Digital Potentiometers, TSOT-23-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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AD5165BUJZ100-R7
Analog Devices · Digital Potentiometers · TSOT-23-8
AD5165BUJZ100-R7 from Analog Devices, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | W | passive | Wiper terminal of the 100 kΩ digital potentiometer. Terminal voltage must satisfy GND ≤ V_W ≤ V_DD. Typical wiper resistance is 50-85 Ω (150 Ω max). |
| 2 | VDD | power_in | Positive power supply, 2.7 V to 5.5 V. Absolute maximum -0.3 V to +7 V referenced to GND. Bypass locally with a decoupling capacitor. |
| 3 | GND | power_in | Digital ground / device common return. |
| 4 | CLK | input | Serial clock input for the 3-wire interface, positive-edge triggered. Maximum clock rate 25 MHz; V_IH ≥ 1.8 V, V_IL ≤ 0.6 V. |
| 5 | SDI | input | Serial data input for the 3-wire interface. The 8-bit wiper code is shifted in MSB first, clocked on the rising edge of CLK. |
| 6 | CS | input | Chip select input, active high (inverted vs. the pin-compatible AD5160). When CS returns low after the shift is complete, the shifted 8-bit code is transferred into the wiper register. |
| 7 | B | passive | B terminal of the 100 kΩ end-to-end resistor. Terminal voltage must satisfy GND ≤ V_B ≤ V_DD; may be biased above or below the A terminal (no polarity restriction). |
| 8 | A | passive | A terminal of the 100 kΩ end-to-end resistor. Terminal voltage must satisfy GND ≤ V_A ≤ V_DD; may be biased above or below the B terminal (no polarity restriction). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSOT-23-8 |
| Category | Data Acquisition |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
AD5165BUJZ100-R7AD5165BUJZ100-RL7
CAD (KiCad official)
- Symbol:
AD5165BUJZ100-R7 - Footprint:
Package_TO_SOT_SMD:SOT-23-8 - 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
ad5165bujz100-r7-etched.step/ad5165bujz100-r7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5165bujz100-r7.step/ad5165bujz100-r7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (16 pp, sha256
c734dc09ef844d8c, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AD5165BUJZ100-R7
**Analog Devices** · Digital Potentiometers · TSOT-23-8
AD5165BUJZ100-R7 from Analog Devices, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | W | passive | Wiper terminal of the 100 kΩ digital potentiometer. Terminal voltage must satisfy GND ≤ V_W ≤ V_DD. Typical wiper resistance is 50-85 Ω (150 Ω max). |
| 2 | VDD | power_in | Positive power supply, 2.7 V to 5.5 V. Absolute maximum -0.3 V to +7 V referenced to GND. Bypass locally with a decoupling capacitor. |
| 3 | GND | power_in | Digital ground / device common return. |
| 4 | CLK | input | Serial clock input for the 3-wire interface, positive-edge triggered. Maximum clock rate 25 MHz; V_IH ≥ 1.8 V, V_IL ≤ 0.6 V. |
| 5 | SDI | input | Serial data input for the 3-wire interface. The 8-bit wiper code is shifted in MSB first, clocked on the rising edge of CLK. |
| 6 | CS | input | Chip select input, active high (inverted vs. the pin-compatible AD5160). When CS returns low after the shift is complete, the shifted 8-bit code is transferred into the wiper register. |
| 7 | B | passive | B terminal of the 100 kΩ end-to-end resistor. Terminal voltage must satisfy GND ≤ V_B ≤ V_DD; may be biased above or below the A terminal (no polarity restriction). |
| 8 | A | passive | A terminal of the 100 kΩ end-to-end resistor. Terminal voltage must satisfy GND ≤ V_A ≤ V_DD; may be biased above or below the B terminal (no polarity restriction). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSOT-23-8 |
| Category | Data Acquisition |
| Pins | 8 |
## Ordering variants
Same part, different packaging or reel option.
- `AD5165BUJZ100-R7`
- `AD5165BUJZ100-RL7`
## CAD (KiCad official)
- Symbol: `AD5165BUJZ100-R7`
- Footprint: `Package_TO_SOT_SMD:SOT-23-8`
- 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files: `ad5165bujz100-r7-etched.step` / `ad5165bujz100-r7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5165bujz100-r7.step` / `ad5165bujz100-r7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588915537040846848) (16 pp, sha256 `c734dc09ef844d8c`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ad5165bujz100-r7-datasheet.pdf)