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AD5161BRMZ100

Analog Devices · Digital Potentiometers · MSOP-10

AD5161BRMZ100 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A passive A terminal of the variable resistor; the voltage range on the A, B and W terminals is GND to VDD.
2 B passive B terminal of the variable resistor; the voltage range on the A, B and W terminals is GND to VDD.
3 CS/AD0 input Active-low chip select; data is loaded into the DAC register when CS returns high, and the pin also serves as programmable address bit AD0 for multiple-package decoding.
4 SDO/NC output Serial data output that is open-drain and requires a pull-up resistor; the table also lists this pin as No Connect (NC).
5 SDI/SDA bidirectional Serial data input (SDI) in SPI mode and serial data input/output (SDA) in I2C mode.
6 CLK/SCL input Serial clock input, positive-edge triggered.
7 GND power_in Digital ground.
8 DIS input Digital interface select: SPI when DIS = 0 and I2C when DIS = 1.
9 VDD power_in Positive power supply, specified at 2.7 V to 5.5 V.
10 W passive W (wiper) terminal of the variable resistor; the voltage range on the A, B and W terminals is GND to VDD.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10
Category ADC/DAC/Data Conversion
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Resistor Differential Nonlinearity R-DNL -1 0.1 1 LSB RWB, VA = no connect 4
Resistor Integral Nonlinearity R-INL -2 0.25 2 LSB RWB, VA = no connect 4
Nominal Resistor Tolerance ∆RAB -30 30 % TA = 25°C 4
Wiper Resistance RW 50 120 Ω VDD = 5 V 4
Differential Nonlinearity DNL -1 0.1 1 LSB 4
Integral Nonlinearity INL -1 0.3 1 LSB 4
Full-Scale Error VWFSE -3 -1 0 LSB Code = 0xFF 4
Zero-Scale Error VWZSE 0 1 3 LSB Code = 0x00 4
Shutdown Supply Current IDD_SD 0.01 1 µA VDD = 5.5 V 4
Common-Mode Leakage ICM 1 nA VA = VB = VDD/2 4
Input Logic High VIH 2.4 V 4
Input Logic Low VIL 0.8 V 4
Input Logic High VIH 2.1 V VDD = 3 V 4
Input Logic Low VIL 0.6 V VDD = 3 V 4
Input Current IIL -1 1 µA VIN = 0 V or 5 V 4
Power Supply Range VDD 2.7 5.5 V 4
Supply Current IDD 3 8 µA VIH = 5 V or VIL = 0 V 4
Power Supply Sensitivity PSS -0.05 0.02 0.05 %/% ∆VDD = +5 V ± 10%, Code = Midscale 4
Power Supply Voltage Range, supply pin VDD to GND (absolute maximum) VDD -0.3 7 V VDD to GND 6
Maximum Terminal Current IMAX1 -20 20 mA 6
Digital Inputs and Output Voltage to GND 0 7 V 6
Operating Temperature Range -40 125 °C 6
Maximum Junction Temperature TJMAX 150 °C 6
Storage Temperature Range -65 150 °C 6
Lead Temperature (Soldering) 300 °C 10 sec 6
SPI Clock Frequency fCLK 25 MHz 5
Input Clock Pulsewidth tCH, tCL 20 ns Clock level high or low 5
Data Setup Time tDS 5 ns 5
Data Hold Time tDH 5 ns 5
CS Setup Time tCSS 15 ns 5
CS High Pulsewidth tCSW 40 ns 5
CLK Fall to CS Fall Hold Time tCSH0 0 ns 5
CLK Fall to CS Rise Hold Time tCSH1 0 ns 5
CS Rise to Clock Rise Setup tCS1 10 ns 5
SCL Clock Frequency fSCL 400 kHz 5
Bus Free Time between STOP and START t1 1.3 µs 5
Hold Time (Repeated START) t2 0.6 µs 5
Low Period of SCL Clock t3 1.3 µs 5
High Period of SCL Clock t4 0.6 50 µs 5
Setup Time for Repeated START Condition t5 0.6 µs 5
Data Hold Time (I2C) t6 0.9 µs 5
Data Setup Time (I2C) t7 100 ns 5
Fall Time of Both SDA and SCL Signals t8 300 ns 5
Rise Time of Both SDA and SCL Signals t9 300 ns 5
Setup Time for STOP Condition t10 0.6 µs 5
Thermal Resistance, junction-to-ambient (10-Lead MSOP) θJA 200 °C/W 10-Lead MSOP 6
Nominal End-to-End Resistance (RAB) for AD5161BRMZ100 RAB 100 kΩ 15
Resistance Temperature Coefficient ∆RAB/∆T 45 ppm/°C VAB = VDD, Wiper = no connect 4
Voltage Divider Temperature Coefficient ∆VW/∆T 15 ppm/°C Code = 0x80 4
Capacitance A, B CA,B 45 pF f = 1 MHz, measured to GND, Code = 0x80 4
Capacitance W CW 60 pF f = 1 MHz, measured to GND, Code = 0x80 4
Input Capacitance CIL 5 pF 4
Bandwidth -3dB (100 kΩ column) BW 40 kHz RAB = 10 kΩ/50 kΩ/100 kΩ, Code = 0x80 4
Total Harmonic Distortion THDW 0.05 % VA =1 V rms, VB = 0 V, f = 1 kHz, RAB = 10 kΩ 4
VW Settling Time (100 kΩ) tS 2 µs VA = 5 V, VB = 0 V, ±1 LSB error band 4
Resistor Noise Voltage Density eN_WB 9 nV/√Hz RWB = 5 kΩ, RS = 0 4

CAD (KiCad official)

  • Symbol: AD5161BRMZ100
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: ad5161brmz100-etched.step / ad5161brmz100-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5161brmz100.step / ad5161brmz100.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 b974abd28e91a958, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF