AD5142BRUZ10-RL7

{
  "slug": "ad5142bruz10-rl7",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Digital Potentiometers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "ad5142bruz10-rl7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ad5142bruz10-rl7.kicad_sym",
    "ad5142bruz10-rl7.kicad_mod",
    "ad5142bruz10-rl7.glb",
    "ad5142bruz10-rl7.step",
    "ad5142bruz10-rl7.lbr",
    "docs/hero.png",
    "docs/ad5142bruz10-rl7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ad5142bruz10-rl7-hero.glb",
    "ad5142bruz10-rl7-hero.overlay.json",
    "ad5142bruz10-rl7-etched.glb"
  ],
  "component": {
    "mpn": "AD5142BRUZ10-RL7",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Digital Potentiometers",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/ad5122_5142.pdf",
    "parts": {
      "symbol": "ad5142bruz10-rl7.kicad_sym",
      "footprint": "ad5142bruz10-rl7.kicad_mod",
      "model_3d": "ad5142bruz10-rl7-hero.glb",
      "model_3d_plain": "ad5142bruz10-rl7-etched.glb",
      "model_3d_step": "ad5142bruz10-rl7-etched.step",
      "model_3d_step_plain": "ad5142bruz10-rl7.step",
      "lbr": "ad5142bruz10-rl7.lbr"
    },
    "distributor_links": {
      "lcsc": "C206883",
      "digikey": "AD5142BRUZ10-RL7TR-ND",
      "mouser": "584-AD5142BRUZ10-RL7"
    },
    "distributor_check": {
      "checked_at": "2026-10-29T01:30:39Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "AD5142BRUZ10-RL7TR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-AD5142BRUZ10-RL7",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "INDEP",
        "type": "input",
        "description": "Linear gain setting mode at power-up: each string resistor is loaded independently from its associated memory location, and once enabled it cannot be disabled by software."
      },
      {
        "number": "2",
        "name": "RESET",
        "type": "input",
        "description": "Active-low hardware reset that refreshes the RDAC registers from EEPROM; tie to VLOGIC if the pin is not used."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin serving as the logic ground reference."
      },
      {
        "number": "4",
        "name": "A1",
        "type": "passive",
        "description": "Terminal A of RDAC1, with VSS ≤ VA ≤ VDD."
      },
      {
        "number": "5",
        "name": "W1",
        "type": "passive",
        "description": "Wiper terminal of RDAC1, with VSS ≤ VW ≤ VDD."
      },
      {
        "number": "6",
        "name": "B1",
        "type": "passive",
        "description": "Terminal B of RDAC1, with VSS ≤ VB ≤ VDD."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative power supply; decouple with 0.1 µF ceramic and 10 µF capacitors."
      },
      {
        "number": "8",
        "name": "A2",
        "type": "passive",
        "description": "Terminal A of RDAC2, with VSS ≤ VA ≤ VDD."
      },
      {
        "number": "9",
        "name": "W2",
        "type": "passive",
        "description": "Wiper terminal of RDAC2, with VSS ≤ VW ≤ VDD."
      },
      {
        "number": "10",
        "name": "B2",
        "type": "passive",
        "description": "Terminal B of RDAC2, with VSS ≤ VB ≤ VDD."
      },
      {
        "number": "11",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive power supply; decouple with 0.1 µF ceramic and 10 µF capacitors."
      },
      {
        "number": "12",
        "name": "VLOGIC",
        "type": "power_in",
        "description": "Logic power supply from 1.8 V to VDD; decouple with 0.1 µF ceramic and 10 µF capacitors."
      },
      {
        "number": "13",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock line; data is clocked in on the logic low transition."
      },
      {
        "number": "14",
        "name": "SDI",
        "type": "input",
        "description": "Serial data input."
      },
      {
        "number": "15",
        "name": "SDO",
        "type": "output",
        "description": "Serial data output; open-drain, so it requires an external pull-up resistor."
      },
      {
        "number": "16",
        "name": "SYNC",
        "type": "input",
        "description": "Active-low synchronization input; data is loaded into the input shift register when SYNC returns high."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The ordering guide (page 26) lists AD5142BRUZ10-RL7 as a 16-Lead TSSOP (RU-16) with SPI interface, s"
        ],
        "pages_sent": 9,
        "cost_usd": 0.0515,
        "at": "2026-10-29T01:30:19"
      },
      "datasheet": {
        "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/ad5122_5142.pdf",
        "pages": 27,
        "sha256": "5cd9d7ed6a4c5f65",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ad5142bruz10-rl7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad5142bruz10-rl7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c4321ef1a65f7a8269901e1cb4ab8b6ec31c8997462a95a48c729d4cca1cf1f9",
        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}