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AD5142ABRUZ10-RL7

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Analog Devices Digital Potentiometers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionad5142abruz10-rl7factory-2.0.0extractor-text

Verified AD5142ABRUZ10-RL7

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AD5142ABRUZ10-RL7 · TSSOP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 29-page datasheet
  • ✓distributor: lcsc C649265, digikey 505-AD5142ABRUZ10-RL7TR-ND, mouser 584-AD5142ABRUZ10RL7
  • ✓family: TSSOP-16_4.4x5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-sx3bwpff/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ad5142abruz10-rl7.kicad_sym✓ ad5142abruz10-rl7.kicad_mod✓ ad5142abruz10-rl7.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers ad5142abruz10-rl7: viewers · Ray 3d ago
ad5142abruz10-rl7-etched.glb Publish 0.1.0 · Ray 3d ago
ad5142abruz10-rl7-etched.step ad5142abruz10-rl7: factory component page (tier=mfr) · Ray 3d ago
ad5142abruz10-rl7-hero.glb ad5142abruz10-rl7: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
ad5142abruz10-rl7-hero.overlay.json Publish 0.1.0 · Ray 3d ago
ad5142abruz10-rl7.glb Publish 0.1.0 · Ray 3d ago
ad5142abruz10-rl7.kicad_mod Publish 0.1.0 · Ray 3d ago
ad5142abruz10-rl7.kicad_sym Publish 0.1.0 · Ray 3d ago
ad5142abruz10-rl7.lbr Publish 0.1.0 · Ray 3d ago
ad5142abruz10-rl7.step Publish 0.1.0 · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago
verification.json Verified: Published by the parts factory: tier mfr, 16 pins · Ray 3d ago

AD5142ABRUZ10-RL7

Analog Devices · Digital Potentiometers · TSSOP-16

AD5142ABRUZ10-RL7 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INDEP input Linear gain setting mode at power-up: each string resistor is loaded from its associated memory location, and once INDEP is enabled it cannot be disabled by software.
2 RESET input Active-low hardware reset that refreshes the RDAC registers from EEPROM; tie RESET to VLOGIC if the pin is not used.
3 GND power_in Ground pin, logic ground reference.
4 A1 passive Terminal A of RDAC1, with VSS ≤ VA ≤ VDD.
5 W1 passive Wiper terminal of RDAC1, with VSS ≤ VW ≤ VDD.
6 B1 passive Terminal B of RDAC1, with VSS ≤ VB ≤ VDD.
7 VSS power_in Negative power supply; decouple with 0.1 µF ceramic and 10 µF capacitors.
8 A2 passive Terminal A of RDAC2, with VSS ≤ VA ≤ VDD.
9 W2 passive Wiper terminal of RDAC2, with VSS ≤ VW ≤ VDD.
10 B2 passive Terminal B of RDAC2, with VSS ≤ VB ≤ VDD.
11 VDD power_in Positive power supply; decouple with 0.1 µF ceramic and 10 µF capacitors.
12 VLOGIC power_in Logic power supply, 1.8 V to VDD; decouple with 0.1 µF ceramic and 10 µF capacitors.
13 SCL input I2C serial clock line.
14 SDA bidirectional I2C serial data input/output.
15 ADDR1 input Programmable address pin (ADDR1) for multiple package decoding.
16 ADDR0 input Programmable address pin (ADDR0) for multiple package decoding.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-16
Category ADC/DAC/Data Conversion
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Resistor Integral Nonlinearity (RAB = 10 kΩ) R-INL -2 0.2 2 LSB RAB = 10 kΩ, VDD ≥ 2.7 V 3
Resistor Integral Nonlinearity (RAB = 10 kΩ) R-INL -5 1.5 5 LSB RAB = 10 kΩ, VDD < 2.7 V 5
Resistor Differential Nonlinearity R-DNL -0.5 0.2 0.5 LSB 5
Nominal Resistor Tolerance ΔRAB/RAB -8 1 8 % 5
Nominal Resistance Match RAB1/RAB2 -1 0.2 1 % Code = full scale 5
Wiper Resistance RW 55 125 Ω Code = zero scale, RAB = 10 kΩ 5
Bottom Scale or Top Scale Resistance RBS or RTS 40 80 Ω RAB = 10 kΩ 5
Integral Nonlinearity (RAB = 10 kΩ) INL -1 0.2 1 LSB RAB = 10 kΩ 6
Differential Nonlinearity DNL -0.5 0.2 0.5 LSB 6
Full-Scale Error (RAB = 10 kΩ) VWFSE -2.5 -0.1 LSB RAB = 10 kΩ 6
Zero-Scale Error (RAB = 10 kΩ) VWZSE 1.2 3 LSB RAB = 10 kΩ 6
Voltage Divider Temperature Coefficient (ΔVW/VW)/ΔT × 10^6 -5 5 ppm/°C Code = half scale 6
Maximum Continuous Current IA, IB, IW IA, IB, IW -6 6 mA RAB = 10 kΩ 6
Common-Mode Leakage Current -500 15 500 nA VA = VW = VB 6
Input Current IIN -1 1 µA 6
Output Low Voltage VOL 0.4 V ISINK = 3 mA 6
Output Low Voltage VOL 0.6 V ISINK = 6 mA, VLOGIC > 2.3 V 6
Three-State Leakage Current -1 1 µA 6
Single-Supply Power Range VDD 2.3 5.5 V VSS = GND 6
Dual-Supply Power Range VDD/VSS 2.25 2.75 V 6
Logic Supply Range VLOGIC 1.8 V Single supply, VSS = GND 6
Logic Supply Range VLOGIC 2.25 V Dual supply, VSS < GND 6
Positive Supply Current IDD 0.7 5.5 µA VIH = VLOGIC or VIL = GND, VDD = 5.5 V 6
Negative Supply Current ISS -5.5 -0.7 µA VIH = VLOGIC or VIL = GND 7
Logic Supply Current ILOGIC 0.05 1.4 µA VIH = VLOGIC or VIL = GND 7
Power Supply Rejection Ratio PSRR -66 -60 dB ΔVDD/ΔVSS = VDD ± 10%, code = full scale 7
Absolute Maximum VDD to GND VDD -0.3 7 V 10
Absolute Maximum VSS to GND VSS -7 0.3 V 10
Absolute Maximum VDD to VSS VDD to VSS 7 V 10
Absolute Maximum VLOGIC to GND VLOGIC -0.3 7 V Whichever is less: VDD + 0.3 V or +7.0 V 10
Absolute Maximum Digital Inputs -0.3 7 V Whichever is less: VLOGIC + 0.3 V or +7 V 10
Absolute Maximum Pulsed Terminal Current IA, IW, IB IA, IW, IB -6 6 mA/d Pulsed, frequency > 10 kHz, d = pulse duty factor, RAW = 10 kΩ 10
Absolute Maximum Pulsed Terminal Current IA, IW, IB IA, IW, IB -6 6 mA/√d Pulsed, frequency ≤ 10 kHz, d = pulse duty factor, RAW = 10 kΩ 10
Operating Temperature Range TA -40 125 °C Includes programming of EEPROM memory 10
Maximum Junction Temperature TJ 150 °C 10
Storage Temperature Range -65 150 °C 10
Reflow Soldering Peak Temperature 260 °C Reflow soldering 10
Reflow Time at Peak Temperature 20 40 s Time at peak temperature 10
Junction-to-Ambient Thermal Resistance, 16-Lead TSSOP θJA 134.43 °C/W JEDEC natural convection, 2S2P thermal test board 10
Nominal Resistance (end-to-end, RAB) RAB 10 kΩ Ordering option Z10 (10 kΩ) 2
Resistance Temperature Coefficient (ΔRAB/RAB)/ΔT × 10^6 35 ppm/°C Code = full scale 5
Positive Supply Current IDD 400 nA VIH = VLOGIC or VIL = GND, VDD = 2.3 V 6
EEPROM Store Current IDD_EEPROM_STORE 2 mA VIH = VLOGIC or VIL = GND 6
EEPROM Read Current IDD_EEPROM_READ 320 µA VIH = VLOGIC or VIL = GND 6
Power Dissipation PDISS 3.5 µW VIH = VLOGIC or VIL = GND 6
Input Capacitance CIN 5 pF 6
Three-State Output Capacitance 2 pF 6
Capacitance A, Capacitance B CA, CB 25 pF f = 1 MHz, measured to GND, code = half scale, RAB = 10 kΩ 3
Capacitance W CW 12 pF f = 1 MHz, measured to GND, code = half scale, RAB = 10 kΩ 3
Bandwidth −3 dB BW 3 MHz RAB = 10 kΩ 5
Total Harmonic Distortion THD -80 dB VDD/VSS = ±2.5 V, VA = 1 V rms, VB = 0 V, f = 1 kHz, RAB = 10 kΩ 5
Resistor Noise Density eN_WB 7 nV/√Hz Code = half scale, TA = 25°C, f = 10 kHz, RAB = 10 kΩ 5
VW Settling Time tS 2 µs VA = 5 V, VB = 0 V, zero scale to full scale, ±0.5 LSB error band, RAB = 10 kΩ 5
Crosstalk (CW1/CW2) CT 10 nV-sec RAB = 10 kΩ 5
Analog Crosstalk CTA -90 dB 5
Endurance 1 Mcycles TA = 25°C 5
Endurance 100 kcycles 5
Data Retention 50 years 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper EPAD Exposed Pad. Connect this exposed pad to the potential of the VSS pin, or, alternatively, leave it electrically unconnected. It is recommended that the pad be thermally connected to a copper plan 11

CAD (KiCad official)

  • Symbol: AD5142ABRUZ10-RL7
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ad5142abruz10-rl7-etched.step / ad5142abruz10-rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5142abruz10-rl7.step / ad5142abruz10-rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (29 pp, sha256 d67bcce85b5eaa84, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF