# AD5123BCPZ10-RL7

**ADI(亚德诺)** · IC · LFCSP-16(3x3)

AD5123BCPZ10-RL7 from ADI(亚德诺), in a LFCSP-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | passive | Terminal A of RDAC1, with VSS ≤ VA ≤ VDD. |
| 2 | W1 | passive | Wiper terminal of RDAC1, with VSS ≤ VW ≤ VDD. |
| 3 | B1 | passive | Terminal B of RDAC1, with VSS ≤ VB ≤ VDD. |
| 4 | W3 | passive | Wiper terminal of RDAC3, with VSS ≤ VW ≤ VDD. |
| 5 | B3 | passive | Terminal B of RDAC3, with VSS ≤ VB ≤ VDD. |
| 6 | VSS | power_in | Negative power supply; decouple with 0.1 µF ceramic and 10 µF capacitors. |
| 7 | A2 | passive | Terminal A of RDAC2, with VSS ≤ VA ≤ VDD. |
| 8 | W2 | passive | Wiper terminal of RDAC2, with VSS ≤ VW ≤ VDD. |
| 9 | B2 | passive | Terminal B of RDAC2, with VSS ≤ VB ≤ VDD. |
| 10 | W4 | passive | Wiper terminal of RDAC4, with VSS ≤ VW ≤ VDD. |
| 11 | B4 | passive | Terminal B of RDAC4, with VSS ≤ VB ≤ VDD. |
| 12 | VDD | power_in | Positive power supply; decouple with 0.1 µF ceramic and 10 µF capacitors. |
| 13 | SCL | input | Serial clock line; data is clocked in on the logic low transition. |
| 14 | SDA | bidirectional | Serial data input/output for the I2C interface. |
| 15 | ADDR | input | Programmable address pin for multiple-package decoding. |
| 16 | GND | power_in | Ground pin, serving as the logic ground reference. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | ADI(亚德诺) |
| Package | LFCSP-16(3x3) |
| Category |  |
| Pins | 17 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Resistor Integral Nonlinearity (RAB = 10 kΩ, VDD ≥ 2.7 V) | R-INL | -1 | 0.1 | 1 | LSB | RAB = 10 kΩ, VDD ≥ 2.7 V | 3 |
| Resistor Integral Nonlinearity (RAB = 10 kΩ, VDD < 2.7 V) | R-INL | -2.5 | 1 | 2.5 | LSB | RAB = 10 kΩ, VDD < 2.7 V | 3 |
| Resistor Differential Nonlinearity | R-DNL | -0.5 | 0.1 | 0.5 | LSB |  | 3 |
| Nominal Resistor Tolerance | ΔRAB/RAB | -8 | 1 | 8 | % |  | 3 |
| Wiper Resistance (zero scale, RAB = 10 kΩ) | RW |  | 55 | 125 | Ω | Code = zero scale, RAB = 10 kΩ | 3 |
| Bottom Scale or Top Scale Resistance (RAB = 10 kΩ) | RBS or RTS |  | 40 | 80 | Ω | Bottom Scale or Top Scale, RAB = 10 kΩ | 3 |
| Nominal Resistance Match | RAB1/RAB2 | -1 | 0.2 | 1 | % | Code = full scale | 3 |
| Integral Nonlinearity (RAB = 10 kΩ) | INL | -0.5 | 0.1 | 0.5 | LSB | RAB = 10 kΩ | 3 |
| Differential Nonlinearity | DNL | -0.25 | 0.1 | 0.25 | LSB |  | 3 |
| Full-Scale Error (RAB = 10 kΩ) | VWFSE | -1.5 |  | -0.1 | LSB | RAB = 10 kΩ | 3 |
| Zero-Scale Error (RAB = 10 kΩ) | VWZSE |  | 1 | 1.5 | LSB | RAB = 10 kΩ | 3 |
| Voltage Divider Temperature Coefficient | (ΔVW/VW)/ΔT × 10^6 | -5 |  | 5 | ppm/°C | Code = half scale | 3 |
| Maximum Continuous Current (RAB = 10 kΩ) | IA, IB, and IW | -6 |  | 6 | mA | RAB = 10 kΩ | 3 |
| Common-Mode Leakage Current |  | -500 | 15 | 500 | nA | VA = VW = VB | 3 |
| Input Logic High | VINH | 0.7 |  |  | × VDD |  | 4 |
| Input Logic Low | VINL |  |  | 0.2 | × VDD |  | 4 |
| Input Current | IIN | -1 |  | 1 | µA |  | 4 |
| Output Low Voltage | VOL |  |  | 0.4 | V | ISINK = 3 mA | 4 |
| Output Low Voltage | VOL |  |  | 0.6 | V | ISINK = 6 mA | 4 |
| Three-State Leakage Current |  | -1 |  | 1 | µA |  | 4 |
| Single-Supply Power Range | VDD | 2.3 |  | 5.5 | V | VSS = GND | 4 |
| Dual-Supply Power Range (magnitude) | VDD/VSS | 2.25 |  | 2.75 | V |  | 4 |
| Positive Supply Current (VDD = 5.5 V) | IDD |  | 0.7 | 5.5 | µA | VIH = VDD or VIL = GND, VDD = 5.5 V | 4 |
| Negative Supply Current | ISS | -5.5 |  | -0.7 | µA | VIH = VDD or VIL = GND | 4 |
| Power Supply Rejection Ratio | PSRR | -66 |  | -60 | dB | ΔVDD/ΔVSS = VDD ± 10%, code = full scale | 4 |
| VDD to GND |  | -0.3 |  | 7 | V |  | 9 |
| VSS to GND |  | -7 |  | 0.3 | V |  | 9 |
| VDD to VSS |  |  |  | 7 | V |  | 9 |
| Pulsed Terminal Current (RAW = 10 kΩ, frequency > 10 kHz) | IA, IW, IB | -6 |  | 6 | mA/d | Pulsed; frequency > 10 kHz; RAW = 10 kΩ; d = pulse duty factor | 9 |
| Pulsed Terminal Current (RAW = 10 kΩ, frequency ≤ 10 kHz) | IA, IW, IB | -6 |  | 6 | mA/√d | Pulsed; frequency ≤ 10 kHz; RAW = 10 kΩ; d = pulse duty factor | 9 |
| Operating Temperature Range | TA | -40 |  | 125 | °C | Includes programming of EEPROM memory | 9 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 9 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 9 |
| Reflow Soldering Peak Temperature |  |  |  | 260 | °C | Reflow soldering | 9 |
| Time at Reflow Peak Temperature |  | 20 |  | 40 | sec | At peak temperature | 9 |
| FICDM ESD Rating |  |  |  | 1.5 | kV |  | 9 |
| Resistance Temperature Coefficient | (ΔRAB/RAB)/ΔT × 10^6 |  | 35 |  | ppm/°C | Code = full scale | 3 |
| Capacitance A, Capacitance B (RAB = 10 kΩ) | CA, CB |  | 25 |  | pF | f = 1 MHz, measured to GND, code = half scale | 3 |
| Capacitance W (RAB = 10 kΩ) | CW |  | 12 |  | pF | f = 1 MHz, measured to GND, code = half scale | 3 |
| Input Hysteresis | VHYST |  | 0.1 |  | × VDD |  | 4 |
| Input Capacitance | CIN |  | 5 |  | pF |  | 4 |
| Three-State Output Capacitance |  |  | 2 |  | pF |  | 4 |
| Positive Supply Current (VDD = 2.3 V) | IDD |  | 400 |  | nA | VIH = VDD or VIL = GND, VDD = 2.3 V | 4 |
| EEPROM Store Current | IDD_EEPROM_STORE |  | 2 |  | mA | VIH = VDD or VIL = GND | 4 |
| EEPROM Read Current | IDD_EEPROM_READ |  | 320 |  | µA | VIH = VDD or VIL = GND | 4 |
| Power Dissipation | PDISS |  | 3.5 |  | µW | VIH = VDD or VIL = GND | 4 |
| Bandwidth (−3 dB, RAB = 10 kΩ) | BW |  | 3 |  | MHz | RAB = 10 kΩ | 4 |
| Total Harmonic Distortion (RAB = 10 kΩ) | THD |  | -80 |  | dB | VDD/VSS = ±2.5 V, VA = 1 V rms, VB = 0 V, f = 1 kHz | 4 |
| Resistor Noise Density (RAB = 10 kΩ) | eN_WB |  | 7 |  | nV/√Hz | Code = half scale, TA = 25°C, f = 10 kHz | 4 |
| VW Settling Time (RAB = 10 kΩ) | tS |  | 2 |  | µs | VA = 5 V, VB = 0 V, from zero-scale to full-scale, ±0.5 LSB error band | 4 |
| Crosstalk (CW1/CW2, RAB = 10 kΩ) | CT |  | 10 |  | nV-sec | RAB = 10 kΩ | 4 |
| Analog Crosstalk | CTA |  | -90 |  | dB |  | 4 |
| Endurance |  |  | 1 |  | Mcycles | TA = 25°C | 4 |
| Endurance |  |  | 100 |  | kcycles |  | 4 |
| Data Retention |  |  | 50 |  | years |  | 4 |
| Junction-to-Ambient Thermal Resistance (16-Lead LFCSP) | θJA |  | 75.4 |  | °C/W | 16-Lead LFCSP, JEDEC 2S2P test board | 9 |
| Junction-to-Board Thermal Resistance (16-Lead LFCSP) | θJB |  | 33.4 |  | °C/W | 16-Lead LFCSP, JEDEC 2S2P test board | 9 |

## CAD (KiCad official)

- Symbol: `AD5123BCPZ10-RL7`
- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`
- 3D model: LFCSP-16(3x3) (KiCad packages3D, STEP)
- 3D model files: `ad5123bcpz10-rl7-etched.step` / `ad5123bcpz10-rl7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5123bcpz10-rl7.step` / `ad5123bcpz10-rl7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [ADI(亚德诺) datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5123_5143.pdf) (24 pp, sha256 `1ee8950c9cfffee6`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ad5123bcpz10-rl7-datasheet.pdf)