component

AD5060ARJZ-1500RL7

Public Made by Adom

by adom

Analog Devices Digital To Analog Converters (DACs), SOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionad5060arjz-1500rl7factory-2.0.0extractor-text

Verified AD5060ARJZ-1500RL7

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AD5060ARJZ-1500RL7 · SOT-23-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 24-page datasheet
  • ✓distributor: lcsc C649178, digikey 505-AD5060ARJZ-1500RL7TR-ND, mouser 584-AD5060ARJZ1500R7
  • ✓family: SOT-23-8
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-t6ctuwa1/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.21)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ad5060arjz-1500rl7.kicad_sym✓ ad5060arjz-1500rl7.kicad_mod✓ ad5060arjz-1500rl7.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2d ago
viewers ad5060arjz-1500rl7: viewers · Ray 2d ago
ad5060arjz-1500rl7-etched.glb Publish 0.1.0 · Ray 2d ago
ad5060arjz-1500rl7-etched.step ad5060arjz-1500rl7: factory component page (tier=mfr) · Ray 2d ago
ad5060arjz-1500rl7-hero.glb ad5060arjz-1500rl7: hero GLB from the etched model (keeps the MPN mark) · Ray 2d ago
ad5060arjz-1500rl7-hero.overlay.json Publish 0.1.0 · Ray 2d ago
ad5060arjz-1500rl7.glb Publish 0.1.0 · Ray 2d ago
ad5060arjz-1500rl7.kicad_mod Publish 0.1.0 · Ray 2d ago
ad5060arjz-1500rl7.kicad_sym Publish 0.1.0 · Ray 2d ago
ad5060arjz-1500rl7.lbr Publish 0.1.0 · Ray 2d ago
ad5060arjz-1500rl7.step Publish 0.1.0 · Ray 2d ago
package.json Publish 0.1.0 · Ray 2d ago
page.json Set visibility: public · Ray 2d ago
README.md Publish 0.1.0 · Ray 2d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 2d ago

AD5060ARJZ-1500RL7

Analog Devices · Digital To Analog Converters (DACs) · SOT-23-8

AD5060ARJZ-1500RL7 from Analog Devices, in a SOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIN input Serial data input to the 16-/24-bit shift register, clocked in on the falling edge of the serial clock.
2 VDD power_in Power supply input, operable from 2.7 V to 5.5 V, and should be decoupled to GND.
3 VREF power_in Reference voltage input.
4 VOUT output Analog output voltage from the DAC.
5 AGND power_in Ground reference point for analog circuitry.
6 DACGND power_in Ground input to the DAC core.
7 SYNC input Active-low level-triggered frame synchronization input that enables the input shift register; taking it high before the 16th/24th clock edge interrupts and ignores the write.
8 SCLK input Serial clock input, clocking data into the shift register on the falling edge at rates up to 30 MHz.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOT-23-8
Category ADC/DAC/Data Conversion
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Relative Accuracy (INL), A grade INL -2 0.5 2 LSB -40°C to +85°C, AD5060 A grade 3
Total Unadjusted Error TUE -2 0.1 2 mV -40°C to +85°C 3
Differential Nonlinearity DNL -1 0.5 1 LSB Guaranteed monotonic, -40°C to +85°C 3
Gain Error -0.02 0.01 0.02 % of FSR TA = -40°C to +85°C 3
Offset Error -1.5 0.02 1.5 mV TA = -40°C to +85°C 3
Full-Scale Error -2 0.05 2 mV All 1s loaded to DAC register, TA = -40°C to +85°C 3
Resolution 16 Bits AD5060 3
Gain Error Temperature Coefficient 1 ppm of FSR/°C 3
Offset Error Temperature Coefficient 0.5 µV/°C 3
Output Voltage Range 0 V 0 to VREF 3
Output Voltage Settling Time 4 µs 1/4 scale to 3/4 scale to ±1 LSB, RL = 5 kΩ 3
Output Noise Spectral Density 64 nV/√Hz DAC code = midscale, 1 kHz 3
Slew Rate 1.2 V/µs 1/4 scale to 3/4 scale to ±1 LSB, RL = 5 kΩ, CL = 200 pF 3
DC Power Supply Rejection Ratio -92.11 dB VDD ± 10%, DAC code = full scale 3
VREF Input Range VREF 2 V max is VDD − 50 mV 4
Reference Input Current (Normal) 0.5 µA printed ±0.5 4
Logic Input Current -2 1 2 µA Total current flowing into all pins 4
Input Low Voltage VIL 0.8 V VDD = 4.5 V to 5.5 V 4
Input High Voltage VIH 2 V VDD = 2.7 V to 5.5 V 4
Input High Voltage (low supply) VIH 1.8 V VDD = 2.7 V to 3.6 V 4
Supply Voltage VDD 2.7 5.5 V All digital inputs at 0 V or VDD 4
IDD (Normal Mode) IDD 1 1.2 mA VDD = 5.0 V, VREF = 4.096 V, code = midscale 4
IDD (All Power-Down Modes) IDD 0.33 1 µA VDD = 5.5 V, VREF = 4.096 V, code = midscale 4
SCLK cycle time t1 33 ns VDD = 2.7 V to 5.5 V 5
SCLK high time t2 5 ns 5
SCLK low time t3 3 ns 5
SYNC to SCLK falling edge setup time t4 10 ns 5
Data setup time t5 3 ns 5
Data hold time t6 2 ns 5
SCLK falling edge to SYNC rising edge t7 0 ns 5
Minimum SYNC high time t8 12 ns 5
SYNC rising edge to next SCLK fall ignore t9 9 ns 5
VDD to GND VDD -0.3 7 V 6
Digital Input Voltage to GND -0.3 V max VDD + 0.3 V 6
VOUT to GND VOUT -0.3 V max VDD + 0.3 V 6
VREF to GND VREF -0.3 V max VDD + 0.3 V 6
Operating Temperature Range (A grade) -40 85 °C Industrial (A, B Grade) 6
Storage Temperature Range -65 150 °C 6
Maximum Junction Temperature TJ max 150 °C 6
Reflow Soldering Peak Temperature 260 °C Pb-free, 10 sec to 40 sec 6
Thermal Impedance θJA 206 °C/W SOT-23 package 6
Thermal Impedance θJc 91 °C/W SOT-23 package 6

CAD (KiCad official)

  • Symbol: AD5060ARJZ-1500RL7
  • Footprint: Package_TO_SOT_SMD:SOT-23-8
  • 3D model: SOT-23-8 (KiCad packages3D, STEP)
  • 3D model files: ad5060arjz-1500rl7-etched.step / ad5060arjz-1500rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5060arjz-1500rl7.step / ad5060arjz-1500rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (24 pp, sha256 79ef63bfa75dcc21, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF