component
ACS733KLATR-40AB-T
Public Made by Adomby adom
Allegro MicroSystems, LLC Current Sensors, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Contents
README
markdownACS733KLATR-40AB-T
Allegro MicroSystems, LLC · Current Sensors · SOIC-16-300mil
ACS733KLATR-40AB-T from Allegro MicroSystems, LLC, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IP+ | passive | Positive terminal for current being sensed; fused internally with pins 2-4, and isolated from signal pins 9-16. |
| 2 | IP+ | passive | Positive terminal for current being sensed; fused internally with pins 1, 3 and 4. |
| 3 | IP+ | passive | Positive terminal for current being sensed; fused internally with pins 1, 2 and 4. |
| 4 | IP+ | passive | Positive terminal for current being sensed; fused internally with pins 1-3. |
| 5 | IP- | passive | Negative terminal for current being sensed; fused internally with pins 6-8. |
| 6 | IP- | passive | Negative terminal for current being sensed; fused internally with pins 5, 7 and 8. |
| 7 | IP- | passive | Negative terminal for current being sensed; fused internally with pins 5, 6 and 8. |
| 8 | IP- | passive | Negative terminal for current being sensed; fused internally with pins 5-7. |
| 9 | GND | power_in | Device ground terminal. |
| 10 | GND | power_in | Device ground terminal. |
| 11 | PROGRAM | input | Programming input pin for factory calibration; connect to ground for best ESD performance. |
| 12 | VIOUT | output | Analog output signal proportional to the sensed current, absolute maximum 6 V. |
| 13 | FAULT | output | Open-drain overcurrent fault output, needs an external pull-up resistor, absolute maximum 6 V. |
| 14 | VOC | input | Sets the overcurrent fault threshold via an external resistor divider from VCC, with VVOC from 0.1×VCC to 0.4×VCC. |
| 15 | VCC | power_in | Device power supply terminal, absolute maximum 6 V. |
| 16 | VCC | power_in | Device power supply terminal, absolute maximum 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems, LLC |
| Package | SOIC-16-300mil |
| Category | Sensors |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (ACS733) | VCC | 3.14 | 3.3 | 3.46 | V | ACS733 | 6 |
| Supply Current (ACS733) | ICC | 20 | 35 | mA | ACS733; VCC = 3.3 V | 6 | |
| Bypass Capacitor | CBYPASS | 0.1 | µF | VCC to GND | 6 | ||
| Output Capacitance Load | CL | 220 | pF | VIOUT to GND | 6 | ||
| Output Resistive Load | RL | 50 | kΩ | VIOUT to GND | 6 | ||
| Output Saturation Voltage Low | VSAT(LOW) | 0.3 | V | VCC = 3.3 V, TA = 25°C, RL(PULLDOWN) = 50 kΩ to VCC | 6 | ||
| Zero Current Output Ratiometry Error | ERAT(Q) | -12 | 10 | 12 | mV | TA = 25°C, VCC = ±5 % variation of nominal supply voltage | 6 |
| Sensitivity Ratiometry Error | ERAT(SENS) | -2 | 1.72 | 2 | % | TA = 25°C, VCC = ±5 % variation of nominal supply voltage | 6 |
| FAULT Response Time | tRESPONSE(F) | 0.2 | 0.5 | 0.75 | μs | Time from IP > IFAULT to when FAULT pin is pulled below VFAULT; input current step from 0 to 1.2 × IFAULT | 7 |
| FAULT Release Time | tC(F) | 0.1 | 0.45 | µs | Time from IP falling below IFAULT, IHYS to when VFAULT is pulled above VFAULTL; 100 pF from FAULT to ground | 7 | |
| FAULT Output Low Voltage | VFAULT | 0.4 | V | In fault condition; RF(PULLUP) = 10 kΩ | 7 | ||
| FAULT Pull-Up Resistance | RF(PULLUP) | 10 | 500 | kΩ | 7 | ||
| VOC Input Current | IVOC | 10 | 100 | nA | 7 | ||
| Current Sensing Range | IPR | -40 | 40 | A | 15 | ||
| Total Output Error | ETOT | -3 | 1.4 | 3 | % | IP = IPR(max), TA = 25°C | 15 |
| Total Output Error | ETOT | -2 | 1.25 | 2 | % | IP = IPR(max), TA = 125°C | 15 |
| Total Output Error | ETOT | -6.5 | 3 | 6.5 | % | IP = IPR(max), TA = -40°C | 15 |
| Sensitivity Error | ESENS | -1.5 | 1.3 | 1.5 | % | IP = IPR(max) / 2, TA = 25°C | 15 |
| Sensitivity Error | ESENS | -2 | 1 | 2 | % | IP = IPR(max) / 2, TA = 125°C | 15 |
| Sensitivity Error | ESENS | -4.5 | 2.2 | 4.5 | % | IP = IPR(max) / 2, TA = -40°C | 15 |
| Voltage Offset Error | VOE | -40 | 9 | 40 | mV | IP = 0 A, TA = 25°C | 15 |
| Voltage Offset Error | VOE | -40 | 7 | 40 | mV | IP = 0 A, TA = 125°C | 15 |
| Voltage Offset Error | VOE | -75 | 35 | 75 | mV | IP = 0 A, TA = -40°C | 15 |
| Linearity Error | ELIN | -1 | 0.5 | 1 | % | TA = 25°C, up to full-scale IP | 15 |
| Sensitivity | Sens | 33 | mV/A | 15 | |||
| Total Output Error | ETOT | 2.3 | % | IP = IPR(max), TA = 25°C to 125°C | 15 | ||
| Voltage Offset Error | VOE | 15 | mV | IP = 0 A, TA = 25°C to 125°C | 15 | ||
| Linearity Error | ELIN | 0.3 | % | TA = 125°C, up to full-scale IP | 15 | ||
| Linearity Error | ELIN | 1.3 | % | TA = -40°C, up to full-scale IP | 15 | ||
| Total Output Error Including Lifetime Drift | ETOT(DRIFT) | 4.9 | % | IP = IPR(max), TA = 25°C, 125°C | 15 | ||
| Offset Voltage Error Including Lifetime Drift | VOE(DRIFT) | 73 | mV | TA = 25°C, 125°C | 15 | ||
| Primary Conductor Resistance | RIP | 1 | mΩ | TA = 25°C | 6 | ||
| Internal Bandwidth | BW | 1 | MHz | Small signal -3 dB; CL = 220 pF | 6 | ||
| Power On Delay Time | tPOD | 180 | µs | TA = 25°C | 6 | ||
| Noise Density | IND | 80 | µA/√Hz | VCC = 3.3 V, TA = 25°C, CL = 220 pF; input referred | 6 | ||
| Supply Voltage | VCC | 6 | V | 3 | |||
| Output Voltage | VIOUT | 6 | V | 3 | |||
| Fault Output Voltage | VFAULT | 6 | V | 3 | |||
| Forward VOC Voltage | VVOC | 6 | V | 3 | |||
| Output Current | IOUT | 15 | mA | Maximum survivable sink or source current on the output | 3 | ||
| Maximum Continuous Current | ICMAX | 55 | A | TA = 25°C | 3 | ||
| Nominal Operating Ambient Temperature | TA | -40 | 125 | °C | Range K | 3 | |
| Maximum Junction Temperature | TJ(max) | 165 | °C | 3 | |||
| Storage Temperature | Tstg | -65 | 170 | °C | 3 | ||
| Junction-to-Ambient Thermal Resistance | RθJA | 17 | °C/W | Mounted on the Allegro ASEK732/3 evaluation board | 3 | ||
| Junction-to-Lead Thermal Resistance | RθJL | 5 | °C/W | Mounted on the Allegro ASEK732/3 evaluation board | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | with 100% matte tin, which is compatible with standard lead (Pb) free printed circuit board assembly processes. Internally, the device | 2 |
CAD (KiCad official)
- Symbol:
ACS733KLATR-40AB-T - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
acs733klatr-40ab-t-etched.step/acs733klatr-40ab-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);acs733klatr-40ab-t.step/acs733klatr-40ab-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Allegro MicroSystems, LLC datasheet (27 pp, sha256
f9374b1e7e3d0f4f, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).