component
ACS725LLCTR-30AB-T
Public Made by Adomby adom
Allegro MicroSystems, LLC Current Sensors, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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ACS725LLCTR-30AB-T
Allegro MicroSystems, LLC · Current Sensors · SOP-8
ACS725LLCTR-30AB-T from Allegro MicroSystems, LLC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IP+ | passive | Terminal for current being sensed, fused internally; pins 1 and 2 are the primary conductor input, isolated from signal pins 5-8 (1.2 mΩ typical conductor resistance with pins 3 and 4). |
| 2 | IP+ | passive | Terminal for current being sensed, fused internally; pins 1 and 2 are the primary conductor input, isolated from signal pins 5-8 (1.2 mΩ typical conductor resistance with pins 3 and 4). |
| 3 | IP- | passive | Terminal for current being sensed, fused internally; pins 3 and 4 are the primary conductor output, isolated from signal pins 5-8 (1.2 mΩ typical conductor resistance with pins 1 and 2). |
| 4 | IP- | passive | Terminal for current being sensed, fused internally; pins 3 and 4 are the primary conductor output, isolated from signal pins 5-8 (1.2 mΩ typical conductor resistance with pins 1 and 2). |
| 5 | GND | power_in | Signal ground terminal. |
| 6 | FILTER | passive | Terminal for external capacitor that sets bandwidth; forms an RC filter with the internal 1.8 kΩ typical filter resistance RF(int). |
| 7 | VIOUT | output | Analog output signal; load limits are 10 nF maximum capacitance and 4.7 kΩ minimum resistance to GND, with absolute maximum of VCC + 0.5 V. |
| 8 | VCC | power_in | Device power supply terminal; operating range 3 V to 3.6 V (3.3 V typical), absolute maximum 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems, LLC |
| Package | SOP-8 |
| Category | Sensors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Current Sensing Range (min/max) | IPR | -30 | 30 | A | 9 | ||
| Total Output Error | ETOT | -2 | 0.7 | 2 | % | IP = IPR(max); TA = 25°C to 150°C | 9 |
| Total Output Error | ETOT | -6 | 4 | 6 | % | IP = IPR(max); TA = -40°C to 25°C | 9 |
| Sensitivity Error | Esens | -1.5 | 0.7 | 1.5 | % | IP = IPR(max); TA = 25°C to 150°C | 9 |
| Sensitivity Error | Esens | -5.5 | 4 | 5.5 | % | IP = IPR(max); TA = -40°C to 25°C | 9 |
| Offset Voltage | VOE | -10 | 3 | 10 | mV | IP = 0 A; TA = 25°C to 150°C | 9 |
| Offset Voltage | VOE | -30 | 5 | 30 | mV | IP = 0 A; TA = -40°C to 25°C | 9 |
| Sensitivity Error Lifetime Drift | Esens_drift | -3 | 1 | 3 | % | 9 | |
| Total Output Error Lifetime Drift | Etot_drift | -3 | 1 | 3 | % | 9 | |
| Nonlinearity | ELIN | -1.5 | 1.5 | % | Through full range of IP | 5 | |
| Supply Voltage | VCC | 3 | 3.3 | 3.6 | V | 5 | |
| Supply Current | ICC | 10 | 14 | mA | VCC = 3.3 V, output open | 5 | |
| Output Capacitance Load | CL | 10 | nF | VIOUT to GND | 5 | ||
| Output Resistive Load | RL | 4.7 | kΩ | VIOUT to GND | 5 | ||
| Sensitivity | Sens | 44 | mV/A | IPR(min) < IP < IPR(max) | 9 | ||
| Primary Conductor Resistance | RIP | 1.2 | mΩ | TA = 25°C | 5 | ||
| Internal Filter Resistance | RF(int) | 1.8 | kΩ | 5 | |||
| Common Mode Field Rejection Ratio | CMFRR | 40 | dB | Uniform external magnetic field | 5 | ||
| Primary Hall Coupling Factor | G1 | 11 | G/A | TA = 25°C | 5 | ||
| Secondary Hall Coupling Factor | G2 | 2.8 | G/A | TA = 25°C | 5 | ||
| Hall plate Sensitivity Matching | Sensmatch | 1 | % | TA = 25°C | 5 | ||
| Rise Time | tr | 3 | μs | IP = IP(max), TA = 25°C, CL = 1 nF | 5 | ||
| Propagation Delay | tpd | 2 | μs | IP = IP(max), TA = 25°C, CL = 1 nF | 5 | ||
| Response Time | tRESPONSE | 4 | μs | IP = IP(max), TA = 25°C, CL = 1 nF | 5 | ||
| Bandwidth | BW | 120 | kHz | Small signal -3 dB; CL = 1 nF | 5 | ||
| Noise Density | IND | 200 | µA(rms)/√Hz | Input referenced noise density; TA = 25°C, CL = 1 nF | 5 | ||
| Noise | IN | 27 | mA(rms) | Input referenced noise: CF = 4.7 nF, CL = 1 nF, BW = 18 kHz, TA = 25°C | 5 | ||
| Sensitivity Ratiometry Coefficient | SENS_RAT_COEF | 1.3 | VCC = 3.0 to 3.6 V, TA = 25°C | 5 | |||
| Zero Current Output Ratiometry Coefficient | QVO_RAT_COEF | 1 | VCC = 3.0 to 3.6 V, TA = 25°C | 5 | |||
| Saturation Voltage Low | VOL | 0.3 | V | RL = 4.7 kΩ | 5 | ||
| Power-On Time | tPO | 80 | μs | Output reaches 90% of steady-state level, TA = 25°C, IP = IPR(max) applied | 5 | ||
| Shorted Output to Ground Current | Isc(gnd) | 3.3 | mA | TA = 25°C | 5 | ||
| Shorted Output to VCC Current | Isc(vcc) | 45 | mA | TA = 25°C | 5 | ||
| Supply Voltage | VCC | 6 | V | 3 | |||
| Reverse Supply Voltage | VRCC | -0.1 | V | 3 | |||
| Reverse Output Voltage | VRIOUT | -0.1 | V | 3 | |||
| Operating Ambient Temperature | TA | -40 | 150 | °C | Range L | 3 | |
| Junction Temperature | TJ(max) | 165 | °C | 3 | |||
| Storage Temperature | Tstg | -65 | 165 | °C | 3 | ||
| Package Thermal Resistance (Junction to Ambient) | RθJA | 23 | °C/W | Mounted on the Allegro 85-0140 evaluation board with 800 mm2 of 4 oz. copper on each side | 3 | ||
| Package Thermal Resistance (Junction to Lead) | RθJL | 5 | °C/W | Mounted on the Allegro ASEK725 evaluation board | 3 | ||
| Dielectric Surge Strength Test Voltage | VSURGE | 6000 | V | Tested ±5 pulses at 2/minute in compliance to IEC 61000-4-5 | 3 | ||
| Dielectric Strength Test Voltage | VISO | 2400 | VRMS | Agency type-tested for 60 seconds per UL 60950-1 (edition 2) | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | through the primary copper conduction path (from pins 1 and | 1 |
CAD (KiCad official)
- Symbol:
ACS725LLCTR-30AB-T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
acs725llctr-30ab-t-etched.step/acs725llctr-30ab-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);acs725llctr-30ab-t.step/acs725llctr-30ab-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Allegro MicroSystems, LLC datasheet (19 pp, sha256
9bda084881510f93, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).