main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 11d ago
viewers acs724lmatr-50ab-t: viewers · Ray 11d ago
acs724lmatr-50ab-t-etched.glb Publish 0.1.0 · Ray 11d ago
acs724lmatr-50ab-t-etched.step acs724lmatr-50ab-t: factory component page (tier=lcsc) · Ray 11d ago
acs724lmatr-50ab-t-hero.glb acs724lmatr-50ab-t: hero GLB from the etched model (keeps the MPN mark) · Ray 11d ago
acs724lmatr-50ab-t-hero.overlay.json Publish 0.1.0 · Ray 11d ago
acs724lmatr-50ab-t.glb Publish 0.1.0 · Ray 11d ago
acs724lmatr-50ab-t.kicad_mod Publish 0.1.0 · Ray 11d ago
acs724lmatr-50ab-t.kicad_sym Publish 0.1.0 · Ray 11d ago
acs724lmatr-50ab-t.lbr Publish 0.1.0 · Ray 11d ago
acs724lmatr-50ab-t.step Publish 0.1.0 · Ray 11d ago
package.json Publish 0.1.0 · Ray 11d ago
page.json Set visibility: public · Ray 11d ago
README.md Publish 0.1.0 · Ray 11d ago

ACS724LMATR-50AB-T

Allegro MicroSystems, LLC · Current Sensors · SOIC-16-300mil

ACS724LMATR-50AB-T from Allegro MicroSystems, LLC, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IP+ passive Terminal for current being sensed, fused internally; current flows from pins 1-4 to pins 5-8 with 0.85 mΩ typical primary conductor resistance.
2 IP+ passive Terminal for current being sensed, fused internally; current flows from pins 1-4 to pins 5-8 with 0.85 mΩ typical primary conductor resistance.
3 IP+ passive Terminal for current being sensed, fused internally; current flows from pins 1-4 to pins 5-8 with 0.85 mΩ typical primary conductor resistance.
4 IP+ passive Terminal for current being sensed, fused internally; current flows from pins 1-4 to pins 5-8 with 0.85 mΩ typical primary conductor resistance.
5 IP- passive Terminal for current being sensed, fused internally; current exits here after flowing through the primary conductor from pins 1-4.
6 IP- passive Terminal for current being sensed, fused internally; current exits here after flowing through the primary conductor from pins 1-4.
7 IP- passive Terminal for current being sensed, fused internally; current exits here after flowing through the primary conductor from pins 1-4.
8 IP- passive Terminal for current being sensed, fused internally; current exits here after flowing through the primary conductor from pins 1-4.
9 NC unconnected No internal connection; recommended to be left unconnected to maintain high creepage.
10 VCC power_in Device power supply terminal, 4.5 to 5.5 V operation (6 V absolute maximum), with a 0.1 µF bypass capacitor shown to ground.
11 NC unconnected No internal connection; recommended to connect to GND for the best ESD performance.
12 VIOUT output Analog output signal proportional to the sensed current, with load of at least 4.7 kΩ and up to 10 nF capacitance to GND.
13 FILTER passive Terminal for external capacitor that sets bandwidth, forming an RC filter with the 1.7 kΩ typical internal filter resistance.
14 NC unconnected No internal connection; recommended to connect to GND for the best ESD performance.
15 GND power_in Signal ground terminal.
16 NC unconnected No internal connection; recommended to be left unconnected to maintain high creepage.

Key specifications

Parameter Value
Manufacturer Allegro MicroSystems, LLC
Package SOIC-16-300mil
Category Sensors
Pins 16

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper flows through the primary copper conduction path (from pins 1

CAD (KiCad official)

  • Symbol: ACS724LMATR-50AB-T
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: acs724lmatr-50ab-t-etched.step / acs724lmatr-50ab-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); acs724lmatr-50ab-t.step / acs724lmatr-50ab-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allegro MicroSystems, LLC datasheet (23 pp, sha256 84a1c8a666a38891, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF