# ACS724LLCTR-20AU-T

**Allegro MicroSystems LLC** · Current Sensors · SOP-8

ACS724LLCTR-20AU-T from Allegro MicroSystems LLC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IP+ | passive | Primary current path positive terminal; current flows through this terminal, internally fused, with 1.2 mΩ typical resistance. |
| 2 | IP+ | passive | Primary current path positive terminal; current flows through this terminal, internally fused, with 1.2 mΩ typical resistance. |
| 3 | IP- | passive | Primary current path negative terminal; current flows through this terminal, internally fused, with 1.2 mΩ typical resistance. |
| 4 | IP- | passive | Primary current path negative terminal; current flows through this terminal, internally fused, with 1.2 mΩ typical resistance. |
| 5 | GND | power_in | Signal ground terminal; reference potential for the analog output signal VIOUT and sensor IC secondary side. |
| 6 | FILTER | passive | External capacitor connection for bandwidth filtering; forms RC circuit with internal 1.8 kΩ resistance to optimize noise and resolution. |
| 7 | VIOUT | output | Analog output signal proportional to primary sensed current in 0-20 A range; unidirectional output with quiescent voltage of 0.1 × VCC nominal (approximately 0.5 V at 5 V supply). |
| 8 | VCC | power_in | Device power supply terminal; operates at 4.5-5.5 V nominal with typical supply current of 10-14 mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems LLC |
| Package | SOP-8 |
| Category | Magnetic Sensors |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `ACS724LLCTR-20AU-T`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `acs724llctr-20au-t-etched.step` / `acs724llctr-20au-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `acs724llctr-20au-t.step` / `acs724llctr-20au-t.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Allegro MicroSystems LLC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912039633174528) (33 pp, sha256 `27366dfcae62c483`, retrieved 2026-09-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/acs724llctr-20au-t-datasheet.pdf)