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Contents

README

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ACS724LLCTR-20AB-T-JSM

JSMSEMI · Current Sensors · SOP-8

ACS724LLCTR-20AB-T-JSM from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IP+ passive Primary current input, positive direction. Tied internally to pin 2. Current flows into the chip at this terminal through the integrated ~1.2 mΩ primary conductor.
2 IP+ passive Primary current input, positive direction (second terminal of the primary conductor). Tie together with pin 1 on the PCB.
3 IP- passive Primary current output, negative direction. Tied internally to pin 4. Current flows out of the chip at this terminal.
4 IP- passive Primary current output, negative direction (second terminal of the primary conductor). Tie together with pin 3 on the PCB.
5 GND power_in Device signal ground reference for VCC, VOUT, and FILTER. Return path for logic-side supply current.
6 FILTER passive Bandwidth-setting pin. Connect an external capacitor (typ 1 nF, CF) to GND to set the output low-pass bandwidth; default internal bandwidth is 250 kHz.
7 VOUT output Analog output signal proportional to sensed primary current. For the 20AB variant with VCC=5V, sensitivity is 100 mV/A; ratiometric bipolar output centered at VCC/2 (~2.5V) at IP=0A. Output range 0.1V to VCC-0.1V. Drive capability ≤45 mA; recommended load ≥4.7 kΩ.
8 VCC power_in Device power supply pin. ACS724 variant operates at 4.5-5.5V (nominal 5V). Bypass with a 0.1 µF ceramic capacitor to GND close to the pin. Absolute max 6.5V.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOP-8
Category Sensor
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • ACS724LLCTR-05AB-T
  • ACS724LLCTR-10AB-T
  • ACS724LLCTR-20AB-T-JSM
  • ACS724LLCTR-30AB-T
  • ACS724LLCTR-40AB-T
  • ACS724LLCTR-50AB-T
  • ACS724LLCTR-10AU-T
  • ACS724LLCTR-20AU-T
  • ACS724LLCTR-30AU-T
  • ACS724LLCTR-40AU-T
  • ACS724LLCTR-50AU-T
  • ACS725LLCTR-05AB-T
  • ACS725LLCTR-10AB-T
  • ACS725LLCTR-20AB-T
  • ACS725LLCTR-30AB-T
  • ACS725LLCTR-40AB-T
  • ACS725LLCTR-50AB-T

CAD (KiCad official)

  • Symbol: ACS724LLCTR-20AB-T-JSM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: acs724llctr-20ab-t-jsm-etched.step / acs724llctr-20ab-t-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); acs724llctr-20ab-t-jsm.step / acs724llctr-20ab-t-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (16 pp, sha256 b0dfb2b3df2c3bec, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF