ACS724LLCTR-10AU-T

{
 "schema": "adom.pads/1",
 "slug": "acs724llctr-10au-t",
 "footprint": "SOIC-8_3.9x4.9mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -1.905
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"
 },
 "pad_count": 8,
 "symbol_pins": [
  "1",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "IP+",
   "type": "passive",
   "description": "Terminal for current being sensed (positive side). Pins 1 and 2 are fused internally as one side of the primary copper conduction path (~1.2 mΩ). Galvanically isolated from the signal leads (pins 5-8).",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "IP+",
   "type": "passive",
   "description": "Terminal for current being sensed (positive side). Internally fused with pin 1 as one side of the primary copper conduction path. Must be tied to pin 1 on the PCB to carry the full primary current.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "IP-",
   "type": "passive",
   "description": "Terminal for current being sensed (return/negative side). Pins 3 and 4 are fused internally as the return side of the primary copper conduction path. Galvanically isolated from the signal leads.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "IP-",
   "type": "passive",
   "description": "Terminal for current being sensed (return/negative side). Internally fused with pin 3; must be tied to pin 3 on the PCB to carry the full primary current.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "GND",
   "type": "power_in",
   "description": "Signal ground terminal. Reference for VCC, VIOUT, and the FILTER capacitor.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "FILTER",
   "type": "passive",
   "description": "External bandwidth-setting capacitor terminal. A capacitor from FILTER to GND forms an RC low-pass with the internal 1.8 kΩ RF(int); a 1 nF cap gives the nominal 120 kHz bandwidth. Larger CF reduces bandwidth and lowers noise.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "VIOUT",
   "type": "output",
   "description": "Analog output signal proportional to the sensed primary current IP. Ratiometric to VCC with a quiescent output near VCC/2 and 200 mV/A sensitivity (typ) for the -10AU variant. Load: RL ≥ 4.7 kΩ to GND, CL ≤ 10 nF.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "VCC",
   "type": "power_in",
   "description": "Device power supply terminal. 4.5 V to 5.5 V single supply, ICC typ 10 mA (max 14 mA). Bypass with 0.1 µF CBYPASS to GND close to the pin.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}