# ACS723LLCTR-40AB-T

**Allegro MicroSystems, LLC** · Current Sensors · SOIC-8

ACS723LLCTR-40AB-T from Allegro MicroSystems, LLC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IP+ | passive | Terminal for current being sensed, fused internally with pin 2, forming the primary conductor (0.65 mΩ typ.) isolated from signal pins 5-8. |
| 2 | IP+ | passive | Terminal for current being sensed, fused internally with pin 1, forming the primary conductor (0.65 mΩ typ.) isolated from signal pins 5-8. |
| 3 | IP- | passive | Terminal for current being sensed, fused internally with pin 4; current flowing from pins 1 and 2 to pins 3 and 4 gives a positive output slope. |
| 4 | IP- | passive | Terminal for current being sensed, fused internally with pin 3; current flowing from pins 1 and 2 to pins 3 and 4 gives a positive output slope. |
| 5 | GND | power_in | Signal ground terminal. |
| 6 | BW_SEL | input | Selects bandwidth: tied to GND gives 80 kHz, tied to VCC gives 20 kHz for lower noise. |
| 7 | VIOUT | output | Analog output signal proportional to primary current, with load of at least 4.7 kΩ and up to 10 nF to GND, and a maximum rating of 25 V. |
| 8 | VCC | power_in | Device power supply terminal, 4.5 to 5.5 V operating range with 6 V absolute maximum, bypassed with 0.1 µF. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems, LLC |
| Package | SOIC-8 |
| Category | Sensors |
| Pins | 8 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | primary copper conduction path (from pins 1 and 2, to pins 3 | 1 |

## CAD (KiCad official)

- Symbol: `ACS723LLCTR-40AB-T`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `acs723llctr-40ab-t-etched.step` / `acs723llctr-40ab-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `acs723llctr-40ab-t.step` / `acs723llctr-40ab-t.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Allegro MicroSystems, LLC datasheet](docs/acs723llctr-40ab-t-datasheet.pdf) (24 pp, sha256 `e2fc184189eefa51`, retrieved 2026-10-26, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/acs723llctr-40ab-t-datasheet.pdf)