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ACS711KLCTR-12AB-T

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Allegro MicroSystems LLC Current Sensors, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs acs711klctr-12ab-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
acs711klctr-12ab-t-etched.fit.json acs711klctr-12ab-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
acs711klctr-12ab-t-etched.glb acs711klctr-12ab-t: one-pass backfill (re-etched) · Ray
acs711klctr-12ab-t-etched.step acs711klctr-12ab-t: one-pass backfill (re-etched) · Ray
acs711klctr-12ab-t-hero.glb Publish 0.2.1 · Ray
acs711klctr-12ab-t-hero.overlay.json Publish 0.2.1 · Ray
acs711klctr-12ab-t.glb Publish 0.1.0 · Ray
acs711klctr-12ab-t.kicad_mod Publish 0.1.0 · Ray
acs711klctr-12ab-t.kicad_sym Publish 0.1.0 · Ray
acs711klctr-12ab-t.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
acs711klctr-12ab-t.step Publish 0.1.0 · Ray
package.json Publish 0.2.2 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.2 · Ray
README.md acs711klctr-12ab-t: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

ACS711KLCTR-12AB-T

Allegro MicroSystems LLC · Current Sensors · SOP-8

ACS711KLCTR-12AB-T from Allegro MicroSystems LLC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IP+ passive Primary current sense terminal (positive). Pins 1 and 2 are internally fused and form one side of the ~1.2 mΩ internal current-sensing conductor. Rated for 100 VAC/VDC working isolation to pins 5-8.
2 IP+ passive Primary current sense terminal (positive). Tied internally to pin 1; both must be connected in parallel to carry the primary current.
3 IP- passive Primary current sense terminal (negative/return). Pins 3 and 4 are internally fused and form the return side of the internal ~1.2 mΩ conduction path.
4 IP- passive Primary current sense terminal (negative/return). Tied internally to pin 3; both must be connected in parallel to carry the primary current.
5 GND power_in Signal ground terminal. Reference for VCC, VIOUT, and FAULT.
6 FAULT output Overcurrent fault output; active low, open-drain. Latches low when
7 VIOUT output Analog output signal. Ratiometric voltage proportional to primary current IP with 110 mV/A sensitivity centered at VCC/2 for IP = 0 A. VIOH = VCC-0.3 V max, VIOL = 0.3 V max; drives up to 1 nF load; 100 kHz bandwidth, 4.6 µs response time.
8 VCC power_in Device power supply terminal. 3 V to 5.5 V (3.3 V nominal for rated accuracy). Supply current ICC ≈ 4 mA typ (5.5 mA max). Bypass with 0.1 µF ceramic to GND.

Key specifications

Parameter Value
Manufacturer Allegro MicroSystems LLC
Package SOP-8
Category Sensor
Pins 8

Ordering variants

  • ACS711KLCTR-12AB-T
  • ACS711KLCTR-12AB-TELCTR-12AB-T
  • ACS711KLCTR-12AB-TKLCTR-25AB-T
  • ACS711KLCTR-12AB-TELCTR-25AB-T
  • ACS711KLCTR-12AB-TKEXLT-31AB-T
  • ACS711KLCTR-12AB-TEEXLT-31AB-T
  • ACS711KLCTR-12AB-TKEXLT-15AB-T
  • ACS711KLCTR-12AB-TEEXLT-15AB-T

CAD (KiCad official)

  • Symbol: ACS711KLCTR-12AB-T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: acs711klctr-12ab-t-etched.step / acs711klctr-12ab-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); acs711klctr-12ab-t.step / acs711klctr-12ab-t.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
acs711klctr-12ab-t.step 122 KB You want the bare part, or you mark your own boards.
acs711klctr-12ab-t-etched.step 2.6 MB You want the part with ACS711KLCTR-12AB-T already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 664 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allegro MicroSystems LLC datasheet (18 pp, sha256 2123c7c534373016, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF