ACS711KLCTR-12AB-T

@@ -62,6 +62,18 @@   <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-2.6000" y="2.4700"/>+    <vertex x="-2.8400" y="2.8000"/>+    <vertex x="-2.3600" y="2.8000"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.9750" y="2.4500"/>+    <vertex x="1.9500" y="2.4500"/>+    <vertex x="1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="1.4750"/>+  </polygon>   <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -70,7 +82,7 @@   <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/>   <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="ACS711KLCTR-12AB-T">@@ -108,7 +120,13 @@         <connect gate="G$1" pin="FAULT" pad="6"/>         <connect gate="G$1" pin="GND" pad="5"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="ACS711KLCTR-12AB-T" constant="no"/>+          <attribute name="MANUFACTURER" value="Allegro MicroSystems LLC" constant="no"/>+          <attribute name="LCSC_PN" value="C459305" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>

@@ -26,13 +26,15 @@       "model_3d_step": "acs711klctr-12ab-t.step",       "lbr": "acs711klctr-12ab-t.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "lcsc": "C459305"+    },     "pins": [       {         "number": "1",         "name": "IP+",         "type": "passive",-        "description": "Primary current sense terminal (positive). Pins 1 and 2 are internally fused and form one side of the ~1.2 mΩ internal current-sensing conductor. Rated for 100 VAC/VDC working isolation to pins 5-8."+        "description": "Primary current sense terminal (positive). Pins 1 and 2 are internally fused and form one side of the ~1.2 m\u03a9 internal current-sensing conductor. Rated for 100 VAC/VDC working isolation to pins 5-8."       },       {         "number": "2",@@ -44,7 +46,7 @@         "number": "3",         "name": "IP-",         "type": "passive",-        "description": "Primary current sense terminal (negative/return). Pins 3 and 4 are internally fused and form the return side of the internal ~1.2 mΩ conduction path."+        "description": "Primary current sense terminal (negative/return). Pins 3 and 4 are internally fused and form the return side of the internal ~1.2 m\u03a9 conduction path."       },       {         "number": "4",@@ -62,19 +64,19 @@         "number": "6",         "name": "FAULT",         "type": "output",-        "description": "Overcurrent fault output; active low, open-drain. Latches low when |IP| exceeds ±100% of full-scale (±12.5 A for the -12AB variant) with tFAULT ≈ 1.3 µs. Requires an external pull-up resistor (RPU ≥ 1 kΩ) to VCC; VOL ≤ 0.3 V with RPU = 1 kΩ. Reset only by a power-off/on cycle with VCC held below 200 mV for ≥100 µs."+        "description": "Overcurrent fault output; active low, open-drain. Latches low when |IP| exceeds \u00b1100% of full-scale (\u00b112.5 A for the -12AB variant) with tFAULT \u2248 1.3 \u00b5s. Requires an external pull-up resistor (RPU \u2265 1 k\u03a9) to VCC; VOL \u2264 0.3 V with RPU = 1 k\u03a9. Reset only by a power-off/on cycle with VCC held below 200 mV for \u2265100 \u00b5s."       },       {         "number": "7",         "name": "VIOUT",         "type": "output",-        "description": "Analog output signal. Ratiometric voltage proportional to primary current IP with 110 mV/A sensitivity centered at VCC/2 for IP = 0 A. VIOH = VCC-0.3 V max, VIOL = 0.3 V max; drives up to 1 nF load; 100 kHz bandwidth, 4.6 µs response time."+        "description": "Analog output signal. Ratiometric voltage proportional to primary current IP with 110 mV/A sensitivity centered at VCC/2 for IP = 0 A. VIOH = VCC-0.3 V max, VIOL = 0.3 V max; drives up to 1 nF load; 100 kHz bandwidth, 4.6 \u00b5s response time."       },       {         "number": "8",         "name": "VCC",         "type": "power_in",-        "description": "Device power supply terminal. 3 V to 5.5 V (3.3 V nominal for rated accuracy). Supply current ICC ≈ 4 mA typ (5.5 mA max). Bypass with 0.1 µF ceramic to GND."+        "description": "Device power supply terminal. 3 V to 5.5 V (3.3 V nominal for rated accuracy). Supply current ICC \u2248 4 mA typ (5.5 mA max). Bypass with 0.1 \u00b5F ceramic to GND."       }     ],     "provenance": {