component
ACS711ELCTR-12AB-T
Public Made by Adomby adom
Allegro MicroSystems LLC Current Sensors, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
2 files changed
+267−1
package.json+2−1@@ -24,6 +24,7 @@ "docs/hero.png", "docs/acs711elctr-12ab-t-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ] }
pads.jsonadded+265@@ -0,0 +1,265 @@+{+ "schema": "adom.pads/1",+ "slug": "acs711elctr-12ab-t",+ "footprint": "SOIC-8_3.9x4.9mm_P1.27mm",+ "generated_from": {+ "footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",+ "pins": "page.json:component.pins",+ "overrides": null+ },+ "pin1": {+ "pad": "1",+ "at": [+ -2.475,+ -1.905+ ],+ "corner": "top-left",+ "source": "silk-marker",+ "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"+ },+ "pad_count": 8,+ "paste_apertures": 0,+ "issues": [],+ "pads": [+ {+ "pad": "1",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ -1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "1",+ "name": "IP+",+ "type": "passive",+ "description": "Terminal for current being sensed (positive side of the internal copper conduction path). Pins 1 and 2 are fused internally and must be tied together on the PCB. Working voltage between the IP+/IP- side and IC side is rated to 100 VAC peak or VDC (basic isolation).",+ "is_pin1": true,+ "source": {+ "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "2",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ -0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "2",+ "name": "IP+",+ "type": "passive",+ "description": "Terminal for current being sensed (positive side of the internal copper conduction path). Fused internally with pin 1; tie both externally to carry the primary current.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "3",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ 0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "3",+ "name": "IP-",+ "type": "passive",+ "description": "Terminal for current being sensed (negative/return side of the internal copper conduction path). Fused internally with pin 4; tie both externally. Primary conductor resistance is ~1.2 mΩ for the LC package.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "4",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ 1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "4",+ "name": "IP-",+ "type": "passive",+ "description": "Terminal for current being sensed (negative/return side of the internal copper conduction path). Fused internally with pin 3; tie both externally.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "5",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ 1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Signal ground terminal for the IC (isolated from the IP+/IP- current path).",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "6",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ 0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "6",+ "name": "FAULT",+ "type": "output",+ "description": "Overcurrent fault output, active low, open-drain style requiring an external pull-up (RPU ≥ 1 kΩ, typ. to VCC). Trips and latches when |IP| exceeds ±100% of the full-scale range (±12.5 A for the 12AB variant); response time ~1.3 µs. Cleared only by cycling VCC below VCCFR (200 mV max) for at least tCCFR (100 µs).",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "7",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ -0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "7",+ "name": "VIOUT",+ "type": "output",+ "description": "Analog output voltage, ratiometric to VCC, with positive slope proportional to current flowing from IP+ to IP-. Quiescent output is VCC/2 at IP=0 A; sensitivity is 110 mV/A (typ) for the 12AB variant. Drives up to CLOAD=1 nF with RLOAD ≥ 15 kΩ.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "8",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ -1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Device power supply terminal. Operates from 3 to 5.5 V single supply (3.3 V nominal); ICC ~4 mA typ, 5.5 mA max. Bypass with 0.1 µF (CBYP) to GND close to the pin.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ }+ ]+}