component
ACS710KLATR-25CB-NL-T
Public Made by Adomby adom
Allegro MicroSystems, LLC Current Sensors, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownACS710KLATR-25CB-NL-T
Allegro MicroSystems, LLC · Current Sensors · SOIC-16
ACS710KLATR-25CB-NL-T from Allegro MicroSystems, LLC, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IP+ | passive | Sensed current copper conduction path pin, fused internally and looped to the IP- pins, for unidirectional or bidirectional current flow. |
| 2 | IP+ | passive | Sensed current copper conduction path pin, fused internally and looped to the IP- pins, for unidirectional or bidirectional current flow. |
| 3 | IP+ | passive | Sensed current copper conduction path pin, fused internally and looped to the IP- pins, for unidirectional or bidirectional current flow. |
| 4 | IP+ | passive | Sensed current copper conduction path pin, fused internally and looped to the IP- pins, for unidirectional or bidirectional current flow. |
| 5 | IP- | passive | Sensed current copper conduction path pin, fused internally and looped to the IP+ pins, for unidirectional or bidirectional current flow. |
| 6 | IP- | passive | Sensed current copper conduction path pin, fused internally and looped to the IP+ pins, for unidirectional or bidirectional current flow. |
| 7 | IP- | passive | Sensed current copper conduction path pin, fused internally and looped to the IP+ pins, for unidirectional or bidirectional current flow. |
| 8 | IP- | passive | Sensed current copper conduction path pin, fused internally and looped to the IP+ pins, for unidirectional or bidirectional current flow. |
| 9 | GND | power_in | Device ground connection. |
| 10 | VZCR | output | Voltage reference output giving the zero-current (0 A) reference, scaling with VCC; it is not a highly accurate reference. |
| 11 | FILTER | passive | Filter pin for an external capacitor from this pin to GND that sets the device bandwidth. |
| 12 | VIOUT | output | Analog output whose voltage is proportional to the current flowing through the loop between the IP+ and IP- pins. |
| 13 | FAULT | output | Overcurrent fault pin (active-low, printed with an overbar) that transitions to a logic low when the current between IP+ and IP- exceeds the overcurrent fault threshold; open drain per the electrical characteristics. |
| 14 | VCC | power_in | Supply voltage, specified at 3 to 5.5 V. |
| 15 | VOC | input | Overcurrent input whose analog voltage sets the overcurrent fault threshold, with a setting range of VCC × 0.25 to VCC × 0.4. |
| 16 | FAULT_EN | input | Enables overcurrent faulting when high; input low threshold is 0.1×VCC maximum and high threshold is 0.8×VCC minimum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems, LLC |
| Package | SOIC-16 |
| Category | Sensors |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 8 | V | 3 | |||
| Filter Pin Voltage | VFILTER | 8 | V | 3 | |||
| Analog Output Pin Voltage | VIOUT | 32 | V | 3 | |||
| Overcurrent Input Pin Voltage | VOC | 8 | V | 3 | |||
| Overcurrent Fault Pin Voltage | VFAULT | 8 | V | 3 | |||
| Fault Enable (FAULT_EN) Pin Voltage | VFAULTEN | 8 | V | 3 | |||
| Voltage Reference Output Pin Voltage | VZCR | 8 | V | 3 | |||
| DC Reverse Voltage (VCC, FILTER, VIOUT, VOC, FAULT, FAULT_EN, VZCR pins) | VRdcx | -0.5 | V | 3 | |||
| Excess Voltage to Supply (FILTER, VIOUT, VOC, FAULT, FAULT_EN, VZCR pins) | VEX | 0.3 | V | Pin voltage exceeding VCC pin voltage | 3 | ||
| Output Current Source | IIOUT(Source) | 3 | mA | 3 | |||
| Output Current Sink | IIOUT(Sink) | 1 | mA | 3 | |||
| Operating Ambient Temperature, TA Range K | TA | -40 | 125 | °C | 3 | ||
| Junction Temperature (max) | TJ(max) | 165 | °C | 3 | |||
| Storage Temperature | Tstg | -65 | 170 | °C | 3 | ||
| Dielectric Surge Strength Test Voltage | VSURGE | 6000 | V | Tested ±5 pulses at 2/minute per IEC 61000-4-5, 1.2 µs (rise) / 50 µs (width) | 3 | ||
| Dielectric Strength Test Voltage (IEC/UL 60950-1) | VISO | 3600 | VRMS | Agency type-tested for 60 seconds per IEC/UL 60950-1 (2nd Edition) | 3 | ||
| Dielectric Strength Test Voltage (UL 1577) | VISO | 3000 | VRMS | Agency type-tested for 60 seconds per UL 1577 | 3 | ||
| Working Voltage for Basic Isolation | VWVBI | 870 | VPK or VDC | Maximum approved working voltage for basic (single) isolation per IEC/UL 60950-1 (2nd Edition) | 3 | ||
| Working Voltage for Basic Isolation | VWVBI | 616 | VRMS | Maximum approved working voltage for basic (single) isolation per IEC/UL 60950-1 (2nd Edition) | 3 | ||
| Clearance | DCL | 7.5 | mm | Minimum distance through air from IP leads to signal leads | 3 | ||
| Creepage | DCR | 7.5 | mm | Minimum distance along package body from IP leads to signal leads | 3 | ||
| Supply Voltage | VCC | 3 | 5.5 | V | 6 | ||
| Supply Current | ICC | 11 | 14.5 | mA | VIOUT open, FAULT pin high | 6 | |
| Output Capacitance Load | CLOAD | 10 | nF | VIOUT pin to GND | 6 | ||
| Output Resistive Load | RLOAD | 10 | kΩ | VIOUT pin to GND | 6 | ||
| Full Range Linearity | ELIN | -0.75 | 0.75 | % | IP = ±IP0A | 6 | |
| Symmetry | ESYM | 99.1 | 100 | 100.9 | % | IP = ±IP0A | 6 |
| Overcurrent Fault Switch Point Error | EOC | -5 | 5 | % | Switch point in VOC safe operating area; assumes INCOMP = 0 A | 6 | |
| Signal Noise at Overcurrent Comparator Input | INCOMP | -1 | 1 | A | 6 | ||
| Overcurrent Fault Pin Output Voltage | VFAULT | 0.4 | V | 1 mA sink current at FAULT pin | 6 | ||
| Overcurrent Input Pin Resistance | ROC | 2 | MΩ | TA = 25°C, VOC pin to GND | 7 | ||
| Voltage Reference Output Load Current (source) | IZCR | 3 | mA | Source current | 7 | ||
| Voltage Reference Output Load Current (sink) | IZCR | 50 | µA | Sink current | 7 | ||
| Voltage Reference Output Drift | ΔVZCR | -10 | 10 | mV | 7 | ||
| Optimized Accuracy Range | IPOA | -25 | 25 | A | 9 | ||
| Linear Sensing Range | IR | -75 | 75 | A | 9 | ||
| Electrical Offset Voltage Variation Relative to VOUT(QBI) | VOE | -3 | 3 | mV | IP = 0 A, TA = 25°C | 9 | |
| Electrical Offset Voltage Variation Relative to VOUT(QBI) | VOE | -12 | 12 | mV | IP = 0 A, TA = 25°C to 125°C | 9 | |
| Electrical Offset Voltage Variation Relative to VOUT(QBI) | VOE | -18 | 18 | mV | IP = 0 A, TA = -40°C to 25°C | 9 | |
| Total Output Error | ETOT | -2.9 | 2.9 | % | Over full scale of IPOA, IP applied for 5 ms, TA = 25°C to 125°C | 9 | |
| Total Output Error | ETOT | -5.2 | 5.2 | % | Over full scale of IPOA, IP applied for 5 ms, TA = -40°C to 25°C | 9 | |
| Sensitivity | Sens | 28 | mV/A | IP = 25 A, TA = 25°C | 9 | ||
| Sensitivity | Sens | 27.9 | mV/A | IP = 25 A, TA = 25°C to 125°C | 9 | ||
| Sensitivity | Sens | 28.5 | mV/A | IP = 25 A, TA = -40°C to 25°C | 9 | ||
| Noise | VNOISE(rms) | 1 | mV | TA = 25°C, Sens = 28 mV/A, CF = 0, CLOAD = 4.7 nF, RLOAD open | 9 | ||
| Package Thermal Resistance | RθJA | 17 | °C/W | Allegro demo board, 1332 mm2 of 2 oz copper, thermal vias | 3 | ||
| Nominal Supply Voltage | VCCN | 5 | V | 6 | |||
| Magnetic Coupling from Device Conductor to Hall Element | MCHALL | 9.5 | G/A | Current flowing from IP+ to IP- pins | 6 | ||
| Internal Filter Resistance | RF(INT) | 1.7 | kΩ | 6 | |||
| Primary Conductor Resistance | RPRIMARY | 1 | mΩ | TA = 25°C | 6 | ||
| Noise Density | IND | 400 | µA/√(Hz) | Input-referenced noise density; TA = 25°C, CL = 4.7 nF | 6 | ||
| VIOUT Signal Rise Time | tr | 3 | µs | TA = 25°C, swing IP from 0 A to IP0A, no capacitor on FILTER pin, 100 pF from VIOUT to GND | 6 | ||
| VIOUT Signal Propagation Time | tPROP | 1 | µs | TA = 25°C, no capacitor on FILTER pin, 100 pF from VIOUT to GND | 6 | ||
| VIOUT Signal Response Time | tRESPONSE | 4 | µs | TA = 25°C, swing IP from 0 A to IP0A, no capacitor on FILTER pin, 100 pF from VIOUT to GND | 6 | ||
| VIOUT Large Signal Bandwidth | f3dB | 120 | kHz | -3 dB, apply IP such that VIOUT = 1 Vpk-pk, no capacitor on FILTER pin, 100 pF from VIOUT to GND | 6 | ||
| Power-On Time | tPO | 35 | µs | Output reaches 90% of steady-state level, no capacitor on FILTER pin, TA = 25°C | 6 | ||
| Fault Enable (FAULT_EN Pin) Input Resistance | RFEI | 1 | MΩ | 6 | |||
| Fault Enable (FAULT_EN Pin) Delay (Non-Latching versions) | tFED(NL) | 150 | ns | Set FAULT_EN low, VOC = 0.25×VCC, COC = 0 F; run DC IP above overcurrent threshold; reset FAULT_EN low to high; delay from rising FAULT_EN to falling FAULT | 7 | ||
| Undercurrent Fault Response Time (Non-Latching versions) | tUC | 3 | µs | FAULT_EN high ≥20 µs before event; VOC = 0.25×VCC; RPU = 330 kΩ; without external COC capacitor | 7 | ||
| Overcurrent Fault Response Time | tOC | 1.9 | µs | FAULT_EN high ≥20 µs before event; VOC = 0.25×VCC; delay to VFAULT < 0.4 V; without external COC capacitor | 7 | ||
| Overcurrent Fault Reset Delay | tOCR | 500 | ns | Time from VFAULTEN < VIL to VFAULT > 0.8×VCC; RPU = 330 kΩ | 7 | ||
| Overcurrent Fault Reset Hold Time | tOCH | 250 | ns | Time from VFAULTEN < VIL to rising edge of VFAULT | 7 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | 1,2,3,4 IP+ Sensed current copper conduction path pins. Terminals for current being sensed; | 4 |
CAD (KiCad official)
- Symbol:
ACS710KLATR-25CB-NL-T - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
acs710klatr-25cb-nl-t-etched.step/acs710klatr-25cb-nl-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);acs710klatr-25cb-nl-t.step/acs710klatr-25cb-nl-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Allegro MicroSystems, LLC datasheet (23 pp, sha256
f31395d6fef8347b, retrieved 2026-10-29, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).