# ACS70331EOLCTR-005U3

**Allegro MicroSystems, LLC** · Current Sensors · SOIC-8

ACS70331EOLCTR-005U3 from Allegro MicroSystems, LLC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IP+ | passive | Terminal for the current being sensed; fused internally, and one of two IP+ pins that should be connected together. |
| 2 | IP+ | passive | Terminal for the current being sensed; fused internally, and one of two IP+ pins that should be connected together. |
| 3 | IP- | passive | Terminal for the current being sensed; fused internally, and one of two IP- pins that should be connected together. |
| 4 | IP- | passive | Terminal for the current being sensed; fused internally, and one of two IP- pins that should be connected together. |
| 5 | GND | power_in | Device ground terminal. |
| 6 | NC | unconnected | This pin should be left unconnected during normal operation. |
| 7 | VIOUT | output | Analog output representing the current flowing through IP, proportional to the primary current. |
| 8 | VCC | power_in | Device power supply terminal; the ACS70331 operates from a single 3.3 V supply, with 3 to 4.5 V operation stated for high DC PSRR. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems, LLC |
| Package | SOIC-8 |
| Category | Sensors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 3 | 3.3 | 4.5 | V |  | 5 |
| Supply Current | ICC |  | 4.5 | 6 | mA | VCC(min) ≤ VCC ≤ VCC(max), no load on VIOUT, fuses powered down | 5 |
| Supply Current, start-up (fuses powered) | ICC_START_UP |  |  | 7.5 | mA | VCC(min) ≤ VCC ≤ VCC(max), no load on VIOUT, fuses powered (from VCC(min) to tFPD) | 5 |
| Fuse Power Down Time | tFPD |  | 80 | 120 | µs | TA = 25°C | 5 |
| Output Resistive Load | RL | 22 |  |  | kΩ | VIOUT to GND or VIOUT to VCC | 5 |
| Output Capacitive Load | CL |  |  | 100 | pF | VIOUT to GND, output is stable, slew rate and bandwidth are reduced | 5 |
| Output Capacitive Load | CL |  |  | 50 | pF | VIOUT to GND, maintains BW | 5 |
| Saturation Voltage, high | VSAT_HIGH | 2.8 |  |  | V | VCC(min) < VCC < VCC(max); RL = 22 kΩ to GND | 5 |
| Saturation Voltage, low | VSAT_LOW |  | 20 | 200 | mV | VCC(min) < VCC < VCC(max); RL = 22 kΩ to VIOUT | 5 |
| Hysteresis | IH |  | 10 | 20 | mA | TA = 25°C; change in output at zero current after ±10 A pulse | 5 |
| Power Supply Offset Error | VOE(PS) | -10 |  | 10 | mV | Change in offset voltage over 3.0 V < VCC < 4.5 V | 6 |
| Power Supply Sensitivity Error | ESENS(PS) | -0.5 |  | 0.5 | % | Change in sensitivity over 3.0 V < VCC < 4.5 V | 6 |
| Nonlinearity | ELIN | -0.2 |  | 0.2 | % |  | 6 |
| Current Sensing Range | IPR | 0 |  | 5 | A |  | 10 |
| Total Output Error | ETOT | -2.2 |  | 2.2 | % | Measured at IP = IPR(max), TA = 25°C | 10 |
| Total Output Error | ETOT | -3.5 |  | 3.5 | % | Measured at IP = IPR(max), TA = 25°C to 85°C | 10 |
| Total Output Error | ETOT | -6.5 |  | 6.5 | % | Measured at IP = IPR(max), TA = -40°C to 25°C | 10 |
| Sensitivity Error | Esens | -1.5 |  | 1.5 | % | Measured at IP = IPR(max), TA = 25°C | 10 |
| Sensitivity Error | Esens | -3 |  | 3 | % | Measured at IP = IPR(max), TA = 25°C to 85°C | 10 |
| Sensitivity Error | Esens | -5 |  | 5 | % | Measured at IP = IPR(max), TA = -40°C to 25°C | 10 |
| Offset Voltage | VOE | -40 |  | 40 | mV | IP = 0 A, TA = 25°C | 10 |
| Offset Voltage | VOE | -45 |  | 45 | mV | IP = 0 A, TA = 25°C to 85°C | 10 |
| Offset Voltage | VOE | -100 |  | 100 | mV | IP = 0 A, TA = -40°C to 25°C | 10 |
| Supply Voltage (absolute maximum) | VCC |  |  | 7 | V |  | 2 |
| Reverse Supply Voltage | VRCC | -0.1 |  |  | V |  | 2 |
| Output Voltage | VIOUT |  |  | 6 | V |  | 2 |
| Reverse Output Voltage | VRIOUT | -0.1 |  |  | V |  | 2 |
| Working Voltage | VWORKING |  |  | 100 | V | Voltage between pins 1 to 4 and pins 5 to 8 (SOIC) | 2 |
| Maximum Continuous Current | IP(max) | -10 |  | 10 | A |  | 2 |
| Maximum Continuous External Field | B | -50 |  | 50 | G |  | 2 |
| Nominal Operating Ambient Temperature Range E | TA | -40 |  | 85 | °C |  | 2 |
| Maximum Junction Temperature | TJ(max) |  |  | 100 | °C |  | 2 |
| Storage Temperature | Tstg | -65 |  | 125 | °C |  | 2 |
| Primary Conductor Resistance | RIP |  | 1.7 |  | mΩ | SOIC-8 package, TA = 25°C | 5 |
| Primary Conductor Inductance | LIP |  | 4 |  | nH | SOIC-8 package | 5 |
| Power On Time | tPO |  | 5 |  | µs | TA = 25°C | 5 |
| Source Current | ISOURCE |  | 0.4 |  | mA | TA = 25°C | 5 |
| Sink Current | ISINK |  | 0.5 |  | mA | TA = 25°C | 5 |
| Bandwidth | BW |  | 1 |  | MHz | -3 dB bandwidth | 5 |
| Response Time | tRESPONSE |  | 535 |  | ns | 1 V swing on VIOUT, 80% to 80% | 5 |
| Rise Time | tr |  | 460 |  | ns | 1 V swing on VIOUT, 10% to 90% | 5 |
| Propagation Delay | tpd |  | 220 |  | ns | 1 V swing on VIOUT, 20% to 20% | 5 |
| Noise Density | IND |  | 8 |  | µARMS/√Hz | Input referred noise density | 5 |
| Noise | IN |  | 8 |  | mARMS | Input referred noise; TA = 25°C, Bandwidth = 1 MHz | 5 |
| Hysteresis | IH |  | 20 |  | mA | TA = 25°C; change in output at zero current after ±100 A pulse (~20 ms) | 5 |
| Stray Field Sensitivity Error Ratio | STERSENS |  | 0.2 |  | %/G | Measured at 20 G, worst case field orientation | 6 |
| Stray Field Offset Error Ratio | STEROFF |  | 3.8 |  | mA/G | Measured at 20 G, worst case field orientation | 6 |
| Power Supply Rejection Ratio | PSRR |  | 40 |  | dB | DC to 100 Hz, 100 mV pk-pk on VCC | 6 |
| Power Supply Rejection Ratio | PSRR |  | 30 |  | dB | 100 Hz to 100 kHz, 100 mV pk-pk on VCC | 6 |
| Sensitivity | Sens |  | 400 |  | mV/A | IPR(min) < IP < IPR(max) | 10 |
| Zero Current Output Voltage | VIOUT(Q) |  | 0.25 |  | V | IP = 0 mA, TA = 25°C | 10 |

## CAD (KiCad official)

- Symbol: `ACS70331EOLCTR-005U3`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `acs70331eolctr-005u3-etched.step` / `acs70331eolctr-005u3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `acs70331eolctr-005u3.step` / `acs70331eolctr-005u3.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Allegro MicroSystems, LLC datasheet](docs/acs70331eolctr-005u3-datasheet.pdf) (26 pp, sha256 `0e06b3d2c145717e`, retrieved 2026-10-28, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/acs70331eolctr-005u3-datasheet.pdf)