# ACPL-W61L-500E

**Broadcom AVAGO** · Logic Output Optoisolators · SO-6

ACPL-W61L-500E from Broadcom AVAGO, in a SO-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Anode | input | LED anode; forward input current IF is 1.6 mA min to 6.0 mA max for the high level (8 mA absolute maximum average), with a series resistor required. |
| 2 | NC | unconnected | No connection (marked NC* in the functional diagram). |
| 3 | Cathode | input | LED cathode; reverse input voltage is limited to 5 V maximum. |
| 4 | GND | power_in | Output-side ground; a 0.1-µF bypass capacitor must be connected as close as possible between VDD and GND. |
| 5 | Vo | output | Push-pull CMOS output, slew-rate controlled, low when LED is on and high when LED is off; output current is 10 mA maximum. |
| 6 | VDD | power_in | Output-side supply voltage, 2.7 V to 5.5 V recommended (6.5 V absolute maximum), with a 0.1-µF bypass capacitor to GND. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Broadcom AVAGO |
| Package | SO-6 |
| Category | Optoisolators |
| Pins | 6 |

## CAD (KiCad official)

- Symbol: `ACPL-W61L-500E`
- Footprint: `Package_SO:SO-6_4.4x3.6mm_P1.27mm`
- 3D model: SO-6 (KiCad packages3D, STEP)
- 3D model files: `acpl-w61l-500e-etched.step` / `acpl-w61l-500e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `acpl-w61l-500e.step` / `acpl-w61l-500e.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Broadcom AVAGO datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590166300954685440) (21 pp, sha256 `17a794cd4ae69020`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/acpl-w61l-500e-datasheet.pdf)