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ACPL-P341-560E

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Broadcom AVAGO Logic Output Optoisolators, SO-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ACPL-P341-560E

Broadcom AVAGO · Logic Output Optoisolators · SO-6

ACPL-P341-560E from Broadcom AVAGO, in a SO-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ANODE input LED anode; driven by LED current IF(ON) of 7 mA to 16 mA, with a series resistor, for high CMR.
2 NC unconnected No connect; note 13 says pin 2 needs to be connected to LED common for the CMR tests.
3 CATHODE input LED cathode; the input LED reverse voltage is limited to 5 V and VF(OFF) must stay between -3.6 V and +0.8 V.
4 VEE power_in Negative output supply (output-side ground reference); VCC - VEE is 15 V to 30 V recommended and 35 V maximum.
5 VOUT output Rail-to-rail gate drive output with peak output current of 3.0 A maximum and 2.5 A minimum, going from VEE to VCC.
6 VCC power_in Positive output supply, 15 V to 30 V recommended, with a 1 uF bypass capacitor to VEE and UVLO turn-on threshold of 12.1 V to 13.5 V.

Key specifications

Parameter Value
Manufacturer Broadcom AVAGO
Package SO-6
Category Optoisolators
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature TS -55 125 °C 5
Operating Temperature TA -40 105 °C 5
Output IC Junction Temperature TJ 125 °C 5
Average Input Current IF(AVG) 25 mA Note 1: derate linearly above 70°C free-air temperature at 0.3 mA/°C 5
Peak Transient Input Current IF(TRAN) 1 A <1 μs pulse width, 300 pps 5
Reverse Input Voltage VR 5 V 5
High Peak Output Current IOH(PEAK) 3 A Note 2: maximum pulse width 10 μs 5
Low Peak Output Current IOL(PEAK) 3 A Note 2: maximum pulse width 10 μs 5
Total Output Supply Voltage (VCC, VEE) 0 35 V 5
Input Current (Rise/Fall Time) tr(IN)/tf(IN) 500 ns 5
Output Voltage VO(PEAK) -0.5 V upper limit printed as VCC 5
Output IC Power Dissipation PO 700 mW Note 3: derate linearly above 85°C free-air temperature at 16.9 mW/°C 5
Total Power Dissipation PT 745 mW Note 4: derate linearly above 85°C free-air temperature at 15.3 mW/°C 5
Lead Solder Temperature 260 °C for 10 sec., 1.6 mm below seating plane 5
Operating Temperature TA -40 105 °C 5
Output Supply Voltage (VCC, VEE) 15 30 V 5
Input Current (ON) IF(ON) 7 16 mA 5
Input Voltage (OFF) VF(OFF) -3.6 0.8 V 5
High Level Peak Output Current IOH -1 -2.3 A VO = VCC, 4V 6
High Level Peak Output Current IOH -2.5 A VCC, VO ≤ 15V 6
Low Level Peak Output Current IOL 1 3 A VO = VEE + 2.5V 6
Low Level Peak Output Current IOL 2.5 A VO, VEE ≤ 15V 6
High Output Transistor RDS(ON) RDS,OH 1.7 3 Ω IOH = -2.5A 6
Low Output Transistor RDS(ON) RDS,OL 0.8 1.8 Ω IOL = 2.5A 6
Low Level Output Voltage VOL 0.1 0.2 V IO = 100 mA 6
High Level Supply Current ICCH 1.9 3 mA Rg = 10Ω, Cg = 25 nF, IF = 10 mA 6
Low Level Supply Current ICCL 1.9 3 mA Rg = 10Ω, Cg = 25 nF, VF = 0V 6
Threshold Input Current Low to High IFLH 1.5 4 mA Rg = 10Ω, Cg = 25 nF, VO > 5V 6
Threshold Input Voltage High to Low VFHL 0.8 V 6
Input Forward Voltage VF 1.2 1.55 1.95 V IF = 10 mA 6
Input Reverse Breakdown Voltage BVR 5 V IR = 100 μA 6
UVLO Threshold (positive going) VUVLO+ 12.1 12.8 13.5 V VO > 5V, IF = 10 mA 6
UVLO Threshold (negative going) VUVLO- 11.1 11.8 12.4 V 6
Propagation Delay Time to High Output Level tPLH 50 98 200 ns Rg = 10Ω, Cg = 25 nF, f = 20 kHz, Duty Cycle = 50%, IF = 7 mA to 16 mA, VCC = 15V to 30V 7
Propagation Delay Time to Low Output Level tPHL 50 95 200 ns Rg = 10Ω, Cg = 25 nF, f = 20 kHz, Duty Cycle = 50%, IF = 7 mA to 16 mA, VCC = 15V to 30V 7
Pulse Width Distortion PWD 22 70 ns 7
Propagation Delay Difference Between Any Two Parts PDD (tPHL, tPLH) -100 100 ns 7
Output High Level Common Mode Transient Immunity /CMH/ 35 50 kV/μs TA = 25°C, IF = 10 mA, VCC = 30V, VCM = 1500V with split resistors 7
Output Low Level Common Mode Transient Immunity /CML/ 35 50 kV/μs TA = 25°C, VF = 0V, VCC = 30V, VCM = 1500V with split resistors 7
Input-Output Momentary Withstand Voltage (ACPL-P341) VISO 3750 VRMS RH < 50%, t = 1 min., TA = 25°C 7
Rise Time tR 43 ns Vcc = 30 V 7
Fall Time tF 40 ns 7
UVLO Hysteresis UVLOHYS 1 V 6
Input Capacitance CIN 70 pF f = 1 MHz, VF = 0V 6
Temperature Coefficient of Input Forward Voltage ΔVF/ΔTA -1.7 mV/°C IF = 10 mA 6
Input-Output Capacitance CI-O 0.6 pF f = 1 MHz 7
LED-to-Ambient Thermal Resistance R11 135 °C/W Note 19: mounted on high conductivity test board per JEDEC 51-7 7
LED-to-Detector Thermal Resistance R12 27 °C/W 7
Detector-to-LED Thermal Resistance R21 39 °C/W 7
Detector-to-Ambient Thermal Resistance R22 47 °C/W 7

CAD (KiCad official)

  • Symbol: ACPL-P341-560E
  • Footprint: Package_SO:SO-6_4.4x3.6mm_P1.27mm
  • 3D model: SO-6 (KiCad packages3D, STEP)
  • 3D model files: acpl-p341-560e-etched.step / acpl-p341-560e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); acpl-p341-560e.step / acpl-p341-560e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Broadcom AVAGO datasheet (19 pp, sha256 29dc2e7637af404e, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF