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ACPL-M50L-560E

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Broadcom AVAGO Logic Output Optoisolators, SOP-5-175mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ACPL-M50L-560E

Broadcom AVAGO · Logic Output Optoisolators · SOP-5-175mil

ACPL-M50L-560E from Broadcom AVAGO, in a SOP-5-175mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ANODE passive LED anode; recommended input current IFH is 3 to 10 mA, forward input voltage OFF is 0.8 V max, and average forward input current is limited to 20 mA max.
3 CATHODE passive LED cathode; reversed input voltage is limited to 5 V max as an absolute maximum rating.
4 GND power_in Ground reference for the output stage; a 0.1 µF bypass capacitor is recommended between pins 4 and 6.
5 VO output Open-collector output; logic low is 0.4 V max at IO = 3 mA with VCC of 3.3 V or 5 V, output voltage is limited to 24 V max, and peak output current to 16 mA.
6 VCC power_in Supply voltage is 2.7 V to 24 V recommended, with a 30 V absolute maximum rating.

Key specifications

Parameter Value
Manufacturer Broadcom AVAGO
Package SOP-5-175mil
Category Optoisolators
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature TS -55 125 °C 9
Operating Temperature TA -40 105 °C 9
Lead Soldering Cycle Temperature 260 °C 9
Lead Soldering Cycle Time 10 s 9
Average Forward Input Current IF(avg) 20 mA Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C 9
Peak Forward Input Current IF(peak) 40 mA 50% duty cycle, 1-ms pulse width; derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C 9
Peak Transient Input Current IF(trans) 1 A ≤1 µs pulse width, 300 ps 9
Reversed Input Voltage VR 5 V 9
Input Power Dissipation PIN 36 mW Derate linearly above 85°C free-air temperature at a rate of 0.9 mW/°C 9
Output Power Dissipation PO 45 mW Derate linearly above 85°C free-air temperature at a rate of 1.2 mW/°C 9
Average Output Current IO(AVG) 8 mA 9
Peak Output Current IO(PEAK) 16 mA 9
Supply Voltage VCC -0.5 30 V 9
Output Voltage VO -0.5 24 V 9
Supply Voltage VCC 2.7 24 V 9
Input Current, High Level IFH 3 10 mA 9
Operating Temperature TA -40 105 °C 9
Forward Input Voltage (OFF) VF (OFF) 0.8 V 9
Current Transfer Ratio (ACPL-M50L) CTR 100 140 200 % TA = 25°C VO = 0.4V VCC = 3.3V or 5V, IF = 3 mA 10
Current Transfer Ratio (ACPL-M50L) CTR 80 % VO = 0.5V 10
Logic Low Output Voltage VOL 0.2 0.4 V TA = 25°C IO = 3 mA VCC = 3.3V or 5V 10
Logic Low Output Voltage VOL 0.2 0.5 V IO = 1.6 mA, IF = 3 mA 10
Logic High Output Current IOH 0.003 0.5 µA TA = 25°C VO = VCC = 5.5V IF = 0 mA 10
Logic High Output Current IOH 0.01 1 µA VO = VCC = 24V 10
Logic High Output Current IOH 80 µA VO = VCC = 24V 10
Logic Low Supply Current per Channel ICCL 36 100 µA IF = 3 mA, VO = open, VCC = 24V 10
Logic High Supply Current per Channel ICCH 0.02 2 µA IF = 0 mA, VO = open, VCC = 24V 10
Input Forward Voltage VF 1.5 1.8 V TA= 25°C IF = 3 mA 10
Input Forward Voltage VF 1.5 1.95 V IF = 3 mA 10
Input Reversed Breakdown Voltage BVR 5 V IR = 10 µA 10
Propagation Delay Time to Logic Low at Output TPHL 0.2 0.5 µs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA, VCC = 3.3V, RL= 1.2 kΩ, CL = 15 pF, VTHHL = 1.5V 11
Propagation Delay Time to Logic Low at Output TPHL 0.2 1 µs 11
Propagation Delay Time to Logic Low at Output TPHL 0.22 0.5 µs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA, VCC = 5.0V, RL = 1.9 kΩ, CL = 15 pF, VTHHL = 1.5V 11
Propagation Delay Time to Logic Low at Output TPHL 0.22 1 µs 11
Propagation Delay Time to Logic Low at Output TPHL 0.33 0.7 µs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA, VCC = 24V, RL = 10 kΩ, CL = 15 pF, VTHHL = 1.5V 11
Propagation Delay Time to Logic Low at Output TPHL 0.33 1.3 µs 11
Propagation Delay Time to Logic High at Output TPLH 0.38 0.8 µs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA, VCC = 3.3V, RL = 1.2 kΩ, CL = 15 pF, VTHLH = 2.0V 11
Propagation Delay Time to Logic High at Output TPLH 0.38 1.2 µs 11
Propagation Delay Time to Logic High at Output TPLH 0.31 0.7 µs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF= 3 mA, VCC = 5.0V, RL = 1.9 kΩ, CL = 15 pF, VTHLH = 2.0V 11
Propagation Delay Time to Logic High at Output TPLH 0.31 1 µs 11
Propagation Delay Time to Logic High at Output TPLH 0.3 0.7 µs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA, VCC = 24V, RL = 10 kΩ, CL = 15 pF, VTHLH = 2.0V 11
Propagation Delay Time to Logic High at Output TPLH 0.3 1 µs 11
Pulse Width Distortion PWD 0.18 0.8 µs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA, VCC = 3.3V, RL = 1.2 kΩ, CL = 15 pF, VTHHL = 1.5V, VTHLH = 2.0V 11
Pulse Width Distortion PWD 0.18 1.2 µs 11
Pulse Width Distortion PWD 0.1 0.7 µs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA, VCC = 5.0V, RL = 1.9 kΩ, CL = 15 pF, VTHHL = 1.5V, VTHLH = 2.0V 11
Pulse Width Distortion PWD 0.1 1 µs 11
Propagation Delay Difference Between Any Two Parts tpsk 0.18 0.7 µs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA, VCC = 3.3V, RL = 1.2 kΩ, CL = 15 pF, VTHHL = 1.5V, VTHLH = 2.0V 11
Propagation Delay Difference Between Any Two Parts tpsk 0.1 0.6 µs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA, VCC = 5.0V, RL = 1.9 kΩ, CL = 15 pF, VTHHL = 1.5V, VTHLH = 2.0V 11
Common Mode Transient Immunity at Logic High Output /CMH/ 15 25 kV/µs TA = 25°C VCM = 1500V, IF = 0 mA,, RL = 1.2 kΩ or 1.9 kΩ, VCC = 3.3V or 5V 11
Common Mode Transient Immunity at Logic Low Output /CML/ 15 20 kV/µs TA= 25°C VCM = 1500V, IF = 3 mA, RL = 1.2 kΩ, VCC = 5V 11
Common Mode Transient Immunity at Logic Low Output /CML/ 10 15 kV/µs VCM = 1500V, IF = 3 mA, RL = 1.2 kΩ, VCC = 3.3V 11

CAD (KiCad official)

  • Symbol: ACPL-M50L-560E
  • Footprint: Package_SO:SOIC-5-6_4.4x3.6mm_P1.27mm
  • 3D model: SOP-5-175mil (KiCad packages3D, STEP)
  • 3D model files: acpl-m50l-560e-etched.step / acpl-m50l-560e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); acpl-m50l-560e.step / acpl-m50l-560e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Broadcom AVAGO datasheet (19 pp, sha256 eaf4808821ed729b, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF