component

ACPL-M50L-500E

Public Made by Adom

by adom

Broadcom AVAGO Logic Output Optoisolators, SOP-5-175mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentoptoisolatorsacpl-m50l-500efactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
acpl-m50l-500e / README.md
History Download
Ray Publish 0.1.0 3399064 12d ago

ACPL-M50L-500E

Broadcom AVAGO · Logic Output Optoisolators · SOP-5-175mil

ACPL-M50L-500E from Broadcom AVAGO, in a SOP-5-175mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ANODE input LED anode input; the LED forward input current is specified at IF = 3 mA, with a 10 mA IFH maximum and 5 V reverse voltage rating (VR).
3 CATHODE passive LED cathode, returned to the input side; the input is shorted internally to pin 1 for the two-terminal input (reverse voltage limit 5 V).
4 GND power_in Ground reference for the output transistor and detector; recommended 0.1 µF bypass capacitor between pins 4 and 6.
5 VO output Open-collector output, TTL compatible; logic low when the LED is on (IF = 3 mA), absolute maximum output voltage -0.5 V to 24 V and average output current 8 mA.
6 VCC power_in Supply voltage, 2.7 V to 24 V recommended (30 V absolute maximum); bypass with 0.1 µF to GND on pin 4.

Key specifications

Parameter Value
Manufacturer Broadcom AVAGO
Package SOP-5-175mil
Category Optoisolators
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Current Transfer Ratio CTR 100 140 200 % TA = 25°C VO=0.4V VCC=3.3V or 5V IF=3mA 8
Current Transfer Ratio CTR 80 % VO=0.5V 8
Logic Low Output Voltage VOL 0.2 0.4 V TA = 25°C IO=3mA VCC=3.3V or 5V IF=3mA 8
Logic Low Output Voltage VOL 0.2 0.5 V IO=1.6mA 8
Logic High Output Current IOH 0.003 0.5 µA TA = 25°C VO=VCC=5.5V IF=0mA 8
Logic High Output Current IOH 0.01 1 µA VO=VCC=24V 8
Logic High Output Current IOH 80 µA VO=VCC=24V 8
Logic Low Supply Current per Channel ICCL 36 100 µA IF=3mA, VO=open, VCC=24V 8
Logic High Supply Current per Channel ICCH 0.02 2 µA IF=0mA, VO=open, VCC=24V 8
Input Forward Voltage VF 1.5 1.8 V TA=25°C IF=3mA 8
Input Forward Voltage VF 1.5 1.95 V IF=3mA 8
Input Reversed Breakdown Voltage BVR 5 V IR=10µA 8
Temperature Coefficient of Forward Voltage ∆VF/∆TA -1.6 mV/°C IF=3mA 8
Propagation Delay Time to Logic Low at Output (VCC=3.3 V, RL=1.2kΩ) TPHL 0.2 0.5 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=3.3 V, RL=1.2kΩ, CL=15pF, VTHHL=1.5V 9
Propagation Delay Time to Logic Low at Output (VCC=3.3 V, RL=1.2kΩ), over temperature TPHL 0.2 1 µs 9
Propagation Delay Time to Logic Low at Output (VCC=5.0 V, RL=1.9kΩ) TPHL 0.22 0.5 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=5.0 V, RL=1.9kΩ, CL=15pF, VTHHL=1.5V 9
Propagation Delay Time to Logic Low at Output (VCC=5.0 V, RL=1.9kΩ), over temperature TPHL 0.22 1 µs 9
Propagation Delay Time to Logic Low at Output (VCC=24 V, RL=10kΩ) TPHL 0.33 0.7 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=24V, RL=10kΩ, CL=15pF, VTHHL=1.5V 9
Propagation Delay Time to Logic Low at Output (VCC=24 V, RL=10kΩ), over temperature TPHL 0.33 1.3 µs 9
Propagation Delay Time to Logic High at Output (VCC=3.3 V, RL=1.2kΩ) TPLH 0.38 0.8 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=3.3 V, RL=1.2kΩ, CL=15pF, VTHHL=2.0V 9
Propagation Delay Time to Logic High at Output (VCC=3.3 V, RL=1.2kΩ), over temperature TPLH 0.38 1.2 µs 9
Propagation Delay Time to Logic High at Output (VCC=5.0 V, RL=1.9kΩ) TPLH 0.31 0.7 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=5.0 V, RL=1.9kΩ, CL=15pF, VTHHL=2.0V 9
Propagation Delay Time to Logic High at Output (VCC=5.0 V, RL=1.9kΩ), over temperature TPLH 0.31 1 µs 9
Propagation Delay Time to Logic High at Output (VCC=24 V, RL=10kΩ) TPLH 0.3 0.7 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=24V, RL=10kΩ, CL=15pF, VTHHL=2.0V 9
Propagation Delay Time to Logic High at Output (VCC=24 V, RL=10kΩ), over temperature TPLH 0.3 1 µs 9
Pulse Width Distortion (VCC=3.3 V, RL=1.2kΩ) PWD 0.18 0.8 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=3.3 V, RL=1.2kΩ, CL=15pF, VTHHL=1.5V, VTHLH=2.0V 9
Pulse Width Distortion (VCC=3.3 V, RL=1.2kΩ), over temperature PWD 0.18 1.2 µs 9
Pulse Width Distortion (VCC=5.0 V, RL=1.9kΩ) PWD 0.1 0.7 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=5.0V, RL=1.9kΩ, CL=15pF, VTHHL=1.5V, VTHLH=2.0V 9
Pulse Width Distortion (VCC=5.0 V, RL=1.9kΩ), over temperature PWD 0.1 1 µs 9
Pulse Width Distortion (VCC=24 V, RL=10kΩ) PWD 0.1 0.7 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=24V, RL=10kΩ, CL=15pF, VTHHL=1.5V, VTHLH=2.0V 9
Pulse Width Distortion (VCC=24 V, RL=10kΩ), over temperature PWD 0.1 1 µs 9
Propagation Delay Difference Between Any two Parts (VCC=3.3 V, RL=1.2kΩ) tpsk 0.18 0.7 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=3.3 V, RL=1.2kΩ, CL=15pF, VTHHL=1.5V, VTHLH=2.0V 9
Propagation Delay Difference Between Any two Parts (VCC=5.0 V, RL=1.9kΩ) tpsk 0.1 0.6 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=5.0V, RL=1.9kΩ, CL=15pF, VTHHL=1.5V, VTHLH=2.0V 9
Propagation Delay Difference Between Any two Parts (VCC=24 V, RL=10kΩ) tpsk 0.1 0.6 µs TA=25°C Pulse: f=10kHz, Duty cycle=50%, IF= 3mA, VCC=24V, RL=10kΩ, CL=15pF, VTHHL=2.0V 9
Common Mode Transient Immunity at Logic High Output /CMH/ 15 25 kV/µs VCM=1500V, IF=0mA, TA=25°C, RL=1.2kΩ or 1.9kΩ, VCC=3.3 V or 5V 9
Common Mode Transient Immunity at Logic Low Output /CML/ 15 20 kV/µs VCM=1500V, IF=3mA, TA=25°C, RL=1.2kΩ, VCC=5V 9
Common Mode Transient Immunity at Logic Low Output /CML/ 10 15 kV/µs VCM=1500V, IF=3mA, TA=25°C, RL=1.2kΩ, VCC=3.3 V 9
Storage Temperature TS -55 125 °C 7
Operating Temperature TA -40 105 °C 7
Lead Soldering Cycle Temperature 260 °C Time 10 s 7
Average Forward Input Current IF(avg) 20 mA 7
Peak Forward Input Current IF(peak) 40 mA 50% duty cycle, 1ms pulse width 7
Peak Transient Input Current IF(trans) 1 A ≤1µs pulse width, 300ps 7
Reversed Input Voltage VR 5 V 7
Input Power Dissipation PIN 36 mW 7
Output Power Dissipation PO 45 mW 7
Average Output Current IO(AVG) 8 mA 7
Peak Output Current IO(PEAK) 16 mA 7
Supply Voltage VCC -0.5 30 V 7
Output Voltage VO -0.5 24 V 7
Supply Voltage VCC 2.7 24 V 7
Input Current, High Level IFH 3 10 mA 7
Operating Temperature TA -40 105 °C 7
Forward Input Voltage (OFF) VF(OFF) 0.8 V 7

CAD (KiCad official)

  • Symbol: ACPL-M50L-500E
  • Footprint: Package_SO:SOIC-5-6_4.4x3.6mm_P1.27mm
  • 3D model: SOP-5-175mil (KiCad packages3D, STEP)
  • 3D model files: acpl-m50l-500e-etched.step / acpl-m50l-500e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); acpl-m50l-500e.step / acpl-m50l-500e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Broadcom AVAGO datasheet (16 pp, sha256 b297ae34bbb0d71b, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF