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ACPL-K370-500E
Public Made by Adomby adom
AVAGO(Broadcom) Monitors & Reset Circuits, SO-8-6.8mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ACPL-K370-500E
AVAGO(Broadcom) · Monitors & Reset Circuits · SO-8-6.8mm
ACPL-K370-500E from AVAGO(Broadcom), in a SO-8-6.8mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AC1 | input | AC input terminal of the threshold detector, with AC1 and AC2 forming the AC input across which the sensed voltage is applied, giving a nominal AC upper threshold of 5 V and lower threshold of 3.8 V. |
| 2 | DC+ | input | Positive DC input terminal of the threshold detector, with DC+ and DC- giving a nominal DC upper threshold of 3.8 V and lower threshold of 2.59 V. |
| 3 | DC- | input | Negative DC input terminal of the threshold detector, which forms the DC input pair with DC+ and must stay within the input voltage clamp limits (VIHC1 6.1 V typical at 10 mA). |
| 4 | AC2 | input | AC input terminal of the threshold detector, paired with AC1, with an input clamp voltage VIHC2 of 6.8 V typical at 10 mA. |
| 5 | GND | power_in | Ground reference for the detector and output, to which the supply and output voltages are referenced (Pins 8-5 supply and Pins 6-5 output limits: VCC -0.5 V to 20 V absolute maximum). |
| 6 | VO | output | Open-collector logic output that is low when the input exceeds the upper threshold, with a maximum logic low output voltage of 0.4 V at VCC = 4.5 V and IOL = 4.2 mA, and a maximum output voltage rating of 20 V. |
| 7 | NC | unconnected | No internal connection; leave this pin unconnected in the application. |
| 8 | VCC | power_in | Positive supply pin for the output stage, with a recommended supply voltage range of 2 V to 18 V and an absolute maximum of 20 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | AVAGO(Broadcom) |
| Package | SO-8-6.8mm |
| Category | Power Supply Chip |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
ACPL-K370-500E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8-6.8mm (KiCad packages3D, STEP)
- 3D model files:
acpl-k370-500e-etched.step/acpl-k370-500e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);acpl-k370-500e.step/acpl-k370-500e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: AVAGO(Broadcom) datasheet (13 pp, sha256
b5600816c26e53d2, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ACPL-K370-500E
**AVAGO(Broadcom)** · Monitors & Reset Circuits · SO-8-6.8mm
ACPL-K370-500E from AVAGO(Broadcom), in a SO-8-6.8mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AC1 | input | AC input terminal of the threshold detector, with AC1 and AC2 forming the AC input across which the sensed voltage is applied, giving a nominal AC upper threshold of 5 V and lower threshold of 3.8 V. |
| 2 | DC+ | input | Positive DC input terminal of the threshold detector, with DC+ and DC- giving a nominal DC upper threshold of 3.8 V and lower threshold of 2.59 V. |
| 3 | DC- | input | Negative DC input terminal of the threshold detector, which forms the DC input pair with DC+ and must stay within the input voltage clamp limits (VIHC1 6.1 V typical at 10 mA). |
| 4 | AC2 | input | AC input terminal of the threshold detector, paired with AC1, with an input clamp voltage VIHC2 of 6.8 V typical at 10 mA. |
| 5 | GND | power_in | Ground reference for the detector and output, to which the supply and output voltages are referenced (Pins 8-5 supply and Pins 6-5 output limits: VCC -0.5 V to 20 V absolute maximum). |
| 6 | VO | output | Open-collector logic output that is low when the input exceeds the upper threshold, with a maximum logic low output voltage of 0.4 V at VCC = 4.5 V and IOL = 4.2 mA, and a maximum output voltage rating of 20 V. |
| 7 | NC | unconnected | No internal connection; leave this pin unconnected in the application. |
| 8 | VCC | power_in | Positive supply pin for the output stage, with a recommended supply voltage range of 2 V to 18 V and an absolute maximum of 20 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | AVAGO(Broadcom) |
| Package | SO-8-6.8mm |
| Category | Power Supply Chip |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `ACPL-K370-500E`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8-6.8mm (KiCad packages3D, STEP)
- 3D model files: `acpl-k370-500e-etched.step` / `acpl-k370-500e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `acpl-k370-500e.step` / `acpl-k370-500e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [AVAGO(Broadcom) datasheet](docs/acpl-k370-500e-datasheet.pdf) (13 pp, sha256 `b5600816c26e53d2`, retrieved 2026-10-28, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/acpl-k370-500e-datasheet.pdf)