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Ray acpl-c87b-500e: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 578c819 1mo ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "acpl-c87b-500e",
  "title": "ACPL-C87B-500E",
  "brief": "Broadcom AVAGO Isolation Amplifiers, SO-8-6.8mm. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "signal isolation devices",
    "acpl-c87b-500e"
  ],
  "component": {
    "mpn": "ACPL-C87B-500E",
    "manufacturer": "Broadcom AVAGO",
    "package": "SO-8-6.8mm",
    "pin_count": 8,
    "category": "Signal Isolation Devices",
    "subcategory": "Isolation Amplifiers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588906395865657344",
    "parts": {
      "symbol": "acpl-c87b-500e.kicad_sym",
      "footprint": "acpl-c87b-500e.kicad_mod",
      "model_3d": "acpl-c87b-500e-etched.glb",
      "model_3d_plain": "acpl-c87b-500e.glb",
      "model_3d_step": "acpl-c87b-500e-etched.step",
      "model_3d_step_plain": "acpl-c87b-500e.step",
      "lbr": "acpl-c87b-500e.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "VDD1",
        "type": "power_in",
        "description": "Supply voltage for the input (isolated) side, 4.5V to 5.5V, referenced to GND1. A 0.1-µF bypass capacitor must be connected between pins 1 and 4."
      },
      {
        "number": "2",
        "name": "VIN",
        "type": "input",
        "description": "Analog voltage input, referenced to GND1. Nominal input range 0 to 2V (full-scale 2.46V). Equivalent input impedance ~1 GΩ."
      },
      {
        "number": "3",
        "name": "SHDN",
        "type": "input",
        "description": "Shutdown pin, active high. When asserted (VDD1-0.5V to VDD1), reduces input-side supply current IDD1 to ~15 µA. VIL max 0.8V."
      },
      {
        "number": "4",
        "name": "GND1",
        "type": "power_in",
        "description": "Input-side ground reference for VDD1, VIN, and SHDN."
      },
      {
        "number": "5",
        "name": "GND2",
        "type": "power_in",
        "description": "Output-side ground reference for VDD2, VOUT+, and VOUT-."
      },
      {
        "number": "6",
        "name": "VOUT-",
        "type": "output",
        "description": "Negative differential analog output, referenced to GND2. Common-mode output voltage ~1.23V, output resistance ~36 Ω."
      },
      {
        "number": "7",
        "name": "VOUT+",
        "type": "output",
        "description": "Positive differential analog output, referenced to GND2. Common-mode output voltage ~1.23V, output resistance ~36 Ω."
      },
      {
        "number": "8",
        "name": "VDD2",
        "type": "power_in",
        "description": "Supply voltage for the output (isolated) side, 3.0V to 5.5V, referenced to GND2. A 0.1-µF bypass capacitor must be connected between pins 5 and 8."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588906395865657344",
        "pages": 16,
        "sha256": "9828a505b30e5f86",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "acpl-c87b-500e.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "acpl-c87b-500e-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "813876df26f50c7cb0f32537c9530da8ece33e54db00b8d56b4f9632939da923",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Broadcom AVAGO",
      "Package": "SO-8-6.8mm",
      "Category": "Signal Isolation Devices",
      "Pins": "8"
    }
  },
  "variants": [
    {
      "mpn": "ACPL-C87B-500E",
      "kind": "packaging"
    },
    {
      "mpn": "ACPL-C87B-500E-000E",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "acpl-c87b-500e"
  ],
  "discovery_pitch": "ACPL-C87B-500E (Broadcom AVAGO) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "acpl-c87b-500e.kicad_sym",
    "acpl-c87b-500e.kicad_mod",
    "acpl-c87b-500e.glb",
    "acpl-c87b-500e.step",
    "acpl-c87b-500e.lbr",
    "docs/hero.png",
    "docs/acpl-c87b-500e-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T15:29:13.494Z"
}