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Ray acpl-c78a-500e: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) a71677d 1mo ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "acpl-c78a-500e",
  "title": "ACPL-C78A-500E",
  "brief": "Broadcom AVAGO Isolation Amplifiers, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "signal isolation devices",
    "acpl-c78a-500e"
  ],
  "component": {
    "mpn": "ACPL-C78A-500E",
    "manufacturer": "Broadcom AVAGO",
    "package": "SO-8",
    "pin_count": 8,
    "category": "Signal Isolation Devices",
    "subcategory": "Isolation Amplifiers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590208168661061632",
    "parts": {
      "symbol": "acpl-c78a-500e.kicad_sym",
      "footprint": "acpl-c78a-500e.kicad_mod",
      "model_3d": "acpl-c78a-500e-etched.glb",
      "model_3d_plain": "acpl-c78a-500e.glb",
      "model_3d_step": "acpl-c78a-500e-etched.step",
      "model_3d_step_plain": "acpl-c78a-500e.step",
      "lbr": "acpl-c78a-500e.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "VDD1",
        "type": "power_in",
        "description": "Supply voltage for the input (isolator primary) side, 4.5 V to 5.5 V, referenced to GND1. A 0.1 µF bypass capacitor must be connected between pins 1 and 4."
      },
      {
        "number": "2",
        "name": "VIN+",
        "type": "input",
        "description": "Positive analog input to the sigma-delta modulator. Recommended linear input range ±200 mV; absolute steady-state limits −2 V to VDD1 + 0.5 V. Typically driven by the high side of the current-sense shunt."
      },
      {
        "number": "3",
        "name": "VIN-",
        "type": "input",
        "description": "Negative analog input to the sigma-delta modulator, normally connected to GND1 (shunt low side / input-side ground reference)."
      },
      {
        "number": "4",
        "name": "GND1",
        "type": "power_in",
        "description": "Input-side ground (isolator primary). Ground return for VDD1 and the analog input signal."
      },
      {
        "number": "5",
        "name": "GND2",
        "type": "power_in",
        "description": "Output-side ground (isolator secondary). Ground return for VDD2 and the differential output."
      },
      {
        "number": "6",
        "name": "VOUT-",
        "type": "output",
        "description": "Negative side of the fully differential analog output. Output range −0.5 V to VDD2 + 0.5 V (absolute max)."
      },
      {
        "number": "7",
        "name": "VOUT+",
        "type": "output",
        "description": "Positive side of the fully differential analog output. Together with VOUT- forms a differential voltage proportional to the input current-sense signal."
      },
      {
        "number": "8",
        "name": "VDD2",
        "type": "power_in",
        "description": "Supply voltage for the output (isolator secondary) side, 4.5 V to 5.5 V, referenced to GND2. A 0.1 µF bypass capacitor must be connected between pins 5 and 8."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590208168661061632",
        "pages": 17,
        "sha256": "45124e6469995049",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "acpl-c78a-500e.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.4,
          4.9,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "53b055ee4d166c0b9de551669cc1294f95b96baacbfe26d9316b576c1ce29fbf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "acpl-c78a-500e-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.4,
          4.9,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4f697830ed78dea38e3d13b5deb37ead27ede91fe69ba17a45c07f9276357631",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Broadcom AVAGO",
      "Package": "SO-8",
      "Category": "Signal Isolation Devices",
      "Pins": "8"
    }
  },
  "variants": [
    {
      "mpn": "ACPL-C78A-500E-000E",
      "kind": "packaging"
    },
    {
      "mpn": "ACPL-C78A-500E-060E",
      "kind": "packaging"
    },
    {
      "mpn": "ACPL-C78A-500E",
      "kind": "packaging"
    },
    {
      "mpn": "ACPL-C78A-500E-560E",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "acpl-c78a-500e"
  ],
  "discovery_pitch": "ACPL-C78A-500E (Broadcom AVAGO) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "acpl-c78a-500e.kicad_sym",
    "acpl-c78a-500e.kicad_mod",
    "acpl-c78a-500e.glb",
    "acpl-c78a-500e.step",
    "acpl-c78a-500e.lbr",
    "docs/hero.png",
    "docs/acpl-c78a-500e-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T15:28:57.546Z"
}