component
ACPL-217
Public Made by Adomby adom
AOTE Transistor, Photovoltaic Output Optoisolators, SSOP-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+83@@ -0,0 +1,83 @@+# ACPL-217++**AOTE** · Transistor, Photovoltaic Output Optoisolators · SSOP-4++ACPL-217 from AOTE, in a SSOP-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Anode | input | LED anode on the input side; the datasheet rates reverse voltage VR at 6 V and forward current IF at 50 (printed with unit 'A', likely mA). |+| 2 | Cathode | passive | LED cathode on the input side; the reverse voltage limit VR is 6 V per the absolute maximum ratings. |+| 3 | Emitter | passive | Phototransistor emitter on the output side; the emitter-collector voltage VECO is rated 7 V. |+| 4 | Collector | passive | Phototransistor collector on the output side; the collector-emitter voltage VCEO is rated 80 V and collector current IC is 50 (printed with unit 'A', likely mA). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | AOTE |+| Package | SSOP-4 |+| Category | Optoisolators |+| Pins | 4 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Forward Voltage | VF | | 1.2 | 1.4 | V | IF=20mA | 5 |+| Reverse Current | IR | | | 10 | A | VR=4V | 5 |+| Terminal Capacitance | Ct | | 30 | 250 | F | V=0, F=1KHz | 5 |+| Collector Dark Current | ICEO | | | 100 | A | VCE=20V, IF=0 | 5 |+| Collector-Emitter Breakdown Voltage | BVCEO | 80 | | | V | IC=0.1mA, IF=0 | 5 |+| Emitter-Collector Voltage | BVECO | 7 | | | V | IE=0.01mA, IF=0 | 5 |+| Current Transfer Ratio | CTR | 80 | | 600 | % | IF=5mA, VCE=5V | 5 |+| Collector-Emitter Saturation Voltage | VCE(sat) | | 0.1 | 0.2 | V | IF=10mA, IC=1mA | 5 |+| Isolation capacitance | CISO | | 0.3 | 1 | F | V=0, F=1MHz | 5 |+| Rise Time | Tr | | 3 | 18 | µs | VCE=2V, IC=2mA, RL=100Ω | 5 |+| Fall Time | Tf | | 2 | 18 | µs | | 5 |+| Forward Current | IF | | | 50 | A | | 4 |+| Peak forward current | IFP | | | 1000 | A | 1us, pulse | 4 |+| Reverse Voltage | VR | | | 6 | V | | 4 |+| Power Dissipation | PD | | | 70 | W | | 4 |+| Collector Power Dissipation | PC | | | 150 | W | | 4 |+| Collector Current | IC | | | 50 | A | | 4 |+| Collector-Emitter Voltage | VCEO | | | 80 | V | | 4 |+| Emitter-Collector Voltage | VECO | | | 7 | V | | 4 |+| Total Power Dissipation | Ptot | | | 200 | W | | 4 |+| Isolation Voltage | Viso | | | 3750 | Vrms | | 4 |+| Isolation Voltage (insulation test) | Viso | 3750 | | | Vrms | For 1 min | 4 |+| Peak Isolation Voltage | VIORM | | | 600 | Vpeak | DIN/EN/IEC EN60747-5-5 | 4 |+| Transient isolation voltage | VIOTM | | | 5000 | Vpeak | DIN/EN/IEC EN60747-5-5 | 4 |+| Operating Temperature | Topr | -55 | | 110 | ℃ | | 4 |+| Storage Temperature | Tstg | -55 | | 125 | ℃ | | 4 |+| Soldering Temperature | Tsol | | | 260 | ℃ | | 4 |+| Preheat Temperature | Ts | 150 | | 200 | ℃ | Reflow profile | 8 |+| Preheat Time | ts | 60 | | 120 | s | Reflow profile | 8 |+| Ramp-Up Rate (TL to TP) | | | | 3 | ℃/s | Reflow profile | 8 |+| Time Above TL | L | 60 | | 150 | s | Reflow profile | 8 |+| Peak Temperature | TP | | | 260 | ℃ | Reflow profile | 8 |+| Time During Which Tc Is Between (TP -5) and TP | tp | | | 30 | s | Reflow profile | 8 |+| Ramp-down Rate (TP to TL) | | | | 6 | ℃/s | Reflow profile | 8 |+| Hand soldering iron temperature | | | 360 | | ℃ | ±5℃, within 3s; rework or sample testing only | 9 |++## CAD (KiCad official)++- Symbol: `ACPL-217`+- Footprint: `Package_SO:SSOP-4_4.4x2.6mm_P1.27mm`+- 3D model: SSOP-4, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.75 mm nominal SSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `acpl-217-etched.step` / `acpl-217-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `acpl-217.step` / `acpl-217.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [AOTE datasheet](docs/acpl-217-datasheet.pdf) (12 pp, sha256 `63d3bae5b0b804a8`, retrieved 2026-10-18, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/acpl-217-datasheet.pdf)
acpl-217-etched.glbadded⋯ 1 unchanged line ⋯
acpl-217-hero.glbadded⋯ 1 unchanged line ⋯
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acpl-217.lbradded+118@@ -0,0 +1,118 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" 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