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ACNT-H61L-500E

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Broadcom AVAGO Logic Output Optoisolators, SO-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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ACNT-H61L-500E

Broadcom AVAGO · Logic Output Optoisolators · SO-8

ACNT-H61L-500E from Broadcom AVAGO, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Input side ground reference for the LED circuit.
2 Anode input LED anode; accepts forward current 4.5-8 mA in recommended operating conditions.
3 Cathode passive LED cathode; connects to input ground through current-limiting resistor.
4 NC unconnected Not connected.
5 VO output CMOS logic output with active-high configuration; provides 0-VDD signal to external circuitry.
6 Shield power_in Output side ground and Faraday shield; guarantees 20 kV/μs common-mode transient immunity.
7 NC unconnected Not connected.
8 VDD power_in Output power supply 2.7-5.5 V; 0.1 μF bypass capacitor to ground required.

Key specifications

Parameter Value
Manufacturer Broadcom AVAGO
Package SO-8
Category Optoisolators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature TS -55 125 °C 4
Operating Temperature TA -40 105 °C 4
Reverse Input Voltage VR 5 V 4
Supply Voltage VDD 6.5 V 4
Average Forward Input Current IF 10 mA 4
Peak Forward Input Current IF(TRAN) 1 A <1 μs Pulse Width, <300 pulses per second 4
Peak Forward Input Current IF(TRAN) 80 mA <1 μs Pulse Width, <10% Duty Cycle 4
Output Current IO 10 mA 4
Output Voltage (lower limit) VO -0.5 V 4
Input Power Dissipation PI 20 mW 4
Output Power Dissipation PO 22 mW 4
Lead Solder Temperature TLS 260 °C 10 sec., 1.6 mm below seating plane 4
Safety-limiting Case Temperature TS 150 °C Safety-limiting value, maximum allowed in event of failure 3
Safety-limiting Input Current IS, INPUT 400 mA Safety-limiting value, maximum allowed in event of failure 3
Safety-limiting Output Power PS, OUTPUT 1000 mW Safety-limiting value, maximum allowed in event of failure 3
Maximum Working Insulation Voltage VIORM 2262 Vpeak 3
Highest Allowable Overvoltage (tini = 60 sec) VIOTM 12000 Vpeak Transient overvoltage tini = 60 sec 3
Operating Temperature TA -40 105 °C 4
Input Current, Low Level IFL 0 250 μA 4
Input Current, High Level IFH 4.5 8 mA 4
Power Supply Voltage VDD 2.7 5.5 V 4
Forward Input Voltage (OFF) VF (OFF) 0.8 V 4
Input Forward Voltage VF 1.2 1.38 1.85 V IF = 7 mA 4
Input Reverse Breakdown Voltage BVR 7 VIR = 10 μA 4
Logic Low Output Voltage VOL 0.02 0.1 V IF = 7 mA, VI = 5V/3.3V, IO = 20 μA 4
Logic Low Output Voltage VOL 0.2 0.4 V IF = 7 mA, VI = 5V/3.3V, IO = 3.2 mA 4
Input Threshold Current ITH 0.7 3.8 mA 4
Logic Low Output Supply Current IDDL 1 2 mA 4
Logic High Output Supply Current IDDH 1 2 mA 4
Propagation Delay Time to Logic Low Output tPHL 40 100 ns IF = 7 mA, VI = 3.3V/5V, CL= 15 pF, CMOS Signal Levels 5
Propagation Delay Time to Logic High Output tPLH 40 100 ns IF = 7 mA, VI = 3.3V/5V, CL= 15 pF, CMOS Signal Levels 5
Pulse Width tPW 100 ns 5
Pulse Width Distortion PWD 5 40 ns 5
Propagation Delay Skew tPSK 40 ns 5
Static Common-Mode Transient Immunity at Logic High Output /CMH/ 20 35 kV/μs VCM = 1000V, TA = 25°C, IF = 0 mA, VI = 0V, CL= 15 pF, CMOS Signal Levels 5
Static Common-Mode Transient Immunity at Logic Low Output /CML/ 20 35 kV/μs VCM = 1000 V, TA = 25°C, IF = 7 mA, VI = 5V/3.3V, CL= 15 pF, CMOS Signal Levels 5
Input-Output Insulation VISO 7500 Vrms RH < 50% for 1 min. TA = 25°C 5
Input Diode Temperature Coefficient ΔVF/ΔTA -1.5 mV/°C IF = 7 mA 4
Input Capacitance CIN 20 pF f = 1 MHz, VF = 0V 4
Dynamic Common-Mode Transient Immunity CMRD 35 kV/μs VCM = 1000V, TA = 25°C, IF = 7 mA, VI = 5V/3.3V, 10-MBd data rate, the absolute increase of PWD <10 ns 5
Output Rise Time (10% to 90%) tR 10 ns 5
Output Fall Time (90% to 10%) tF 10 ns 5
Input-Output Resistance RI-O 1012 Ω VI-O = 500V 5
Input-Output Capacitance CI-O 0.6 pF f = 1 MHz, TA = 25°C 5

CAD (KiCad official)

  • Symbol: ACNT-H61L-500E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: acnt-h61l-500e-etched.step / acnt-h61l-500e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); acnt-h61l-500e.step / acnt-h61l-500e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Broadcom AVAGO datasheet (12 pp, sha256 21891ab98d8289d1, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF