# ACDBC540-HF

**Comchip** · Schottky Barrier Diodes (SBD) · SMC(DO-214AB)

ACDBC540-HF from Comchip, in a SMC(DO-214AB). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode, marked by the cathode band on the package; Schottky rectifier rated 40 V reverse voltage (VRRM) and 5 A average forward current. |
| 2 | A | passive | Anode of the Schottky barrier rectifier, forward voltage 0.55 V max at IF = 5 A, TA = 25°C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Comchip |
| Package | SMC(DO-214AB) |
| Category | Diodes |
| Pins | 2 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Repetitive peak reverse voltage | VRRM |  |  | 40 | V |  | 1 |
| DC blocking voltage | VDC |  |  | 40 | V |  | 1 |
| RMS voltage | VRMS |  |  | 28 | V |  | 1 |
| Average forward rectified current | IF |  |  | 5 | A |  | 1 |
| Peak forward surge current | IFSM |  |  | 100 | A | 8.3ms single half sine-wave superimposed on rate load (JEDEC method) | 1 |
| Operating temperature range | TJ | -55 |  | 125 | °C |  | 1 |
| Storage temperature range | TSTG | -55 |  | 150 | °C |  | 1 |
| Instantaneous forward voltage | VF |  |  | 0.55 | V | IF = 5A, TA=25°C | 1 |
| Reverse current | IR |  |  | 0.5 | mA | VR = VRRM, TA=25°C | 1 |
| Reverse current | IR |  |  | 10 | mA | VR = VRRM, TA=100°C | 1 |
| Junction capacitance | CJ |  |  | 300 | pF | f=1MHZ and applied 4V DC reverse Voltage | 1 |
| Thermal resistance junction to case | RθJC |  |  | 25 | °C/W |  | 1 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | - Terminals: Lead free plating (Tin finish). -Solderable per MIL-STD-202, Method 208. | 1 |

## CAD (KiCad official)

- Symbol: `ACDBC540-HF`
- Footprint: `Diode_SMD:D_SMC`
- 3D model: SMC(DO-214AB) (KiCad packages3D, STEP)
- 3D model files: `acdbc540-hf-etched.step` / `acdbc540-hf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `acdbc540-hf.step` / `acdbc540-hf.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Comchip datasheet](docs/acdbc540-hf-datasheet.pdf) (4 pp, sha256 `d62e449f1b58a63c`, retrieved 2026-11-02, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/acdbc540-hf-datasheet.pdf)