component
AC78406LGLA
Public Made by Adomby adom
AutoChips Microcontroller Units (MCUs/MPUs/SOCs), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAC78406LGLA
AutoChips · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-100(14x14)
AC78406LGLA from AutoChips, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE16 | bidirectional | GPIO pin muxable to UART1_RTS, SPI2_SIN, PWM2_CH7, PWM4_FLT0, EIO_D3 and TRGMUX_OUT7. |
| 2 | PE15 | bidirectional | GPIO pin muxable to UART1_CTS, SPI2_SCK, PWM2_CH6, PWM4_FLT1, EIO_D2 and TRGMUX_OUT6. |
| 3 | PD1 | bidirectional | GPIO pin muxable to PWM0_CH3, SPI1_SIN, PWM2_CH1, EIO_D1 and TRGMUX_OUT2. |
| 4 | PD0 | bidirectional | GPIO pin muxable to PWM0_CH2, SPI1_SCK, PWM2_CH0, EIO_D0 and TRGMUX_OUT1. |
| 5 | PE11 | bidirectional | GPIO pin muxable to SPI2_CS0, PCT0_ALT1, PWM2_CH5, EIO_D5 and TRGMUX_OUT5. |
| 6 | PE10 | bidirectional | GPIO pin muxable to CLKOUT, SPI2_CS1, PWM2_CH4, CAN0_STB, EIO_D4 and TRGMUX_OUT4. |
| 7 | PE13 | bidirectional | GPIO pin muxable to PWM4_CH5, SPI2_CS2 and PWM2_FLT0. |
| 8 | PE5 | bidirectional | GPIO pin muxable to PWM_CLK2, PWM2_CH0, PWM2_CH3, CAN0_TX, EIO_D7 and EWDG_IN. |
| 9 | PE4 | bidirectional | GPIO pin muxable to PWM2_CH1, PWM2_CH2, CAN0_RX, EIO_D6 and EWDG_OUT_b. |
| 10 | VDD | power_in | Digital supply pin, operating range 2.7 V to 5.5 V (absolute max 5.5 V); needs a 0.1 uF X7R decoupling capacitor close to the pin. |
| 11 | VDDA | power_in | Analog supply pin that must be tied on the board to the same supply as VDDx (within VDD ±0.1 V). |
| 12 | VREFH | power_in | Reference high voltage pin (ADC reference). |
| 13 | VREFL | power_in | Reference low voltage pin (ADC reference). |
| 14 | VSS | power_in | Ground pin. |
| 15 | PB7 | bidirectional | GPIO pin whose default function is HSE_IN (4-30 MHz crystal input, or external clock input up to 50 MHz), also I2C0_SCL. |
| 16 | PB6 | bidirectional | GPIO pin whose default function is HSE_OUT (crystal oscillator output), also I2C0_SDA. |
| 17 | PE14 | bidirectional | GPIO pin muxable to PWM0_FLT1 and PWM2_FLT1. |
| 18 | PE3 | bidirectional | GPIO pin muxable to PWM0_FLT0, UART2_RTS, PWM2_FLT0, CAN3_TX, TRGMUX_IN6 and ACMP0_OUT. |
| 19 | PE12 | bidirectional | GPIO pin muxable to PWM0_FLT3, UART2_TX, PWM5_FLT0 and CAN3_RX. |
| 20 | PD17 | bidirectional | GPIO pin muxable to PWM0_FLT2, UART2_RX, PWM5_FLT1 and CAN3_STB. |
| 21 | PD16 | bidirectional | GPIO pin muxable to PWM0_CH1, SPI0_SIN and ACMP0_RRT. |
| 22 | PD15 | bidirectional | GPIO pin muxable to PWM0_CH0 and SPI0_SCK. |
| 23 | PE9 | bidirectional | GPIO pin muxable to PWM0_CH7 and UART2_CTS. |
| 24 | PD14 | bidirectional | GPIO pin muxable to PWM2_CH5, UART1_TX and CLKOUT. |
| 25 | PD13 | bidirectional | GPIO pin muxable to PWM2_CH4, UART1_RX and RTC_CLKOUT. |
| 26 | PE8 | bidirectional | GPIO pin with ACMP0_IN3 analog input, also PWM0_CH6 and CAN0_STB. |
| 27 | PB5 | bidirectional | GPIO pin muxable to PWM0_CH5, SPI0_CS1, SPI0_CS0, CLKOUT and TRGMUX_IN0. |
| 28 | PB4 | bidirectional | GPIO pin muxable to PWM0_CH4, SPI0_SOUT and TRGMUX_IN1. |
| 29 | PC3 | bidirectional | GPIO pin with ADC0_IN11/ACMP0_IN4 analog inputs, also PWM0_CH3, CAN0_TX and UART0_TX. |
| 30 | PC2 | bidirectional | GPIO pin with ADC0_IN10/ACMP0_IN5 analog inputs, also PWM0_CH2, CAN0_RX and UART0_RX. |
| 31 | PD7 | bidirectional | GPIO pin with ACMP0_IN6 analog input, also UART2_TX and PWM2_FLT3. |
| 32 | PD6 | bidirectional | GPIO pin with ACMP0_IN7 analog input, also UART2_RX and PWM2_FLT2. |
| 33 | PD5 | bidirectional | GPIO pin muxable to PWM2_CH3, PCT0_ALT2, PWM2_FLT1 and TRGMUX_IN7. |
| 34 | PD12 | bidirectional | GPIO pin muxable to PWM2_CH2 and UART2_RTS. |
| 35 | PD11 | bidirectional | GPIO pin muxable to PWM2_CH1, PWM2_CH0 and UART2_CTS. |
| 36 | PD10 | bidirectional | GPIO pin muxable to PWM2_CH0, PWM2_CH1 and CLKOUT. |
| 37 | VSS | power_in | Ground pin. |
| 38 | VDD | power_in | Digital supply pin, operating range 2.7 V to 5.5 V; needs a 0.1 uF X7R decoupling capacitor close to the pin. |
| 39 | PC1 | bidirectional | GPIO pin with ADC0_IN9 analog input, also PWM0_CH1, SPI2_SOUT and PWM1_CH7. |
| 40 | PC0 | bidirectional | GPIO pin with ADC0_IN8 analog input, also PWM0_CH0, SPI2_SIN and PWM1_CH6. |
| 41 | PD9 | bidirectional | GPIO pin muxable to EIO_D0, PWM2_FLT3 and PWM1_CH5. |
| 42 | PD8 | bidirectional | GPIO pin muxable to PWM2_FLT2, EIO_D1 and PWM1_CH4. |
| 43 | PC17 | bidirectional | GPIO pin with ADC0_IN15 analog input, also PWM1_FLT3, CAN2_TX and UART3_TX. |
| 44 | PC16 | bidirectional | GPIO pin with ADC0_IN14 analog input, also PWM1_FLT2, CAN2_RX and UART3_RX. |
| 45 | PC15 | bidirectional | GPIO pin with ADC0_IN13 analog input, also PWM1_CH3, SPI2_SCK, CAN2_STB and TRGMUX_IN8. |
| 46 | PC14 | bidirectional | GPIO pin with ADC0_IN12 analog input, also PWM1_CH2, SPI2_CS0 and TRGMUX_IN9. |
| 47 | PB3 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 48 | PB2 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 49 | PC13 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 50 | PC12 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 51 | PC11 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 52 | PC10 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 53 | PB1 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 54 | PB0 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 55 | PC9 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 56 | PC8 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 57 | PA7 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 58 | PA6 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 59 | PE7 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 60 | VSS | power_in | Ground pin (position taken from the package drawing). |
| 61 | VDD | power_in | Digital supply pin, operating range 2.7 V to 5.5 V (position taken from the package drawing). |
| 62 | PA17 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 63 | PB17 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 64 | PB16 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 65 | PB15 | bidirectional | GPIO port pin; alternate functions not available in the supplied pages (name taken from the package drawing). |
| 66 | PB14 | bidirectional | GPIO pin with ADC1_IN9 / ADC0_INTERLEAVE1 analog function, also PWM0_CH2 and SPI1_SCK. |
| 67 | PB13 | bidirectional | GPIO pin with ADC1_IN8 / ADC0_INTERLEAVE0 analog function, also PWM0_CH1, PWM3_FLT1 and CAN2_TX. |
| 68 | PB12 | bidirectional | GPIO pin with ADC1_IN7 analog input, also PWM0_CH0, PWM3_FLT2 and CAN2_RX. |
| 69 | PD4 | bidirectional | GPIO pin with ADC1_IN6 analog input, also PWM0_FLT3, PWM3_FLT3 and CAN2_STB. |
| 70 | PD3 | bidirectional | GPIO pin with ADC1_IN3 analog input, also PWM3_CH5, SPI1_CS0, EIO_D5, EIO_D7, TRGMUX_IN4 and NMI_b. |
| 71 | PD2 | bidirectional | GPIO pin with ADC1_IN2 analog input, also PWM3_CH4, SPI1_SOUT, EIO_D4, EIO_D6 and TRGMUX_IN5. |
| 72 | PA3 | bidirectional | GPIO pin with ADC1_IN1 analog input, also PWM3_CH1, I2C0_SCL, EWDG_IN, EIO_D5 and UART0_TX. |
| 73 | PA2 | bidirectional | GPIO pin with ADC1_IN0 analog input, also PWM3_CH0, I2C0_SDA, EWDG_OUT_b, EIO_D4 and UART0_RX. |
| 74 | PB11 | bidirectional | GPIO pin muxable to PWM3_CH3. |
| 75 | PB10 | bidirectional | GPIO pin muxable to PWM3_CH2, I2C0_SDA and UART3_TX. |
| 76 | PB9 | bidirectional | GPIO pin muxable to PWM3_CH1, I2C0_SCL and UART3_RX. |
| 77 | PB8 | bidirectional | GPIO pin muxable to PWM3_CH0. |
| 78 | PA1 | bidirectional | GPIO pin with ADC0_IN1 / ACMP0_IN1 analog inputs, also PWM1_CH1, PWM2_CH2, EIO_D3, PWM1_CH0, UART0_RTS and TRGMUX_OUT0. |
| 79 | PA0 | bidirectional | GPIO pin with ADC0_IN0 / ACMP0_IN0 analog inputs, also PWM2_CH1, EIO_D2, PWM2_CH0, UART0_CTS and TRGMUX_OUT3. |
| 80 | PC7 | bidirectional | GPIO pin with ADC1_IN5 analog input, also UART1_TX, CAN1_TX, PWM3_CH3 and PWM1_CH0. |
| 81 | PC6 | bidirectional | GPIO pin with ADC1_IN4 analog input, also UART1_RX, CAN1_RX, PWM3_CH2 and PWM1_CH1. |
| 82 | PA16 | bidirectional | GPIO pin with ADC1_IN13 analog input, also PWM1_CH3 and SPI1_CS2. |
| 83 | PA15 | bidirectional | GPIO pin with ADC1_IN12 analog input, also PWM1_CH2, SPI0_CS3 and SPI2_CS3. |
| 84 | PE6 | bidirectional | GPIO pin with ADC1_IN11 analog input, also SPI0_CS2, PWM3_CH7, CAN1_STB and UART1_RTS. |
| 85 | PE2 | bidirectional | GPIO pin with ADC1_IN10 analog input, also SPI0_SOUT, PCT0_ALT3, PWM3_CH6 and UART1_CTS. |
| 86 | VSS | power_in | Ground pin. |
| 87 | VDD | power_in | Digital supply pin, operating range 2.7 V to 5.5 V; needs a 0.1 uF X7R decoupling capacitor close to the pin. |
| 88 | PA14 | bidirectional | GPIO pin muxable to PWM0_FLT0, PWM3_FLT1, EWDG_IN and PWM1_FLT0. |
| 89 | PA13 | bidirectional | GPIO pin muxable to PWM1_CH7, CAN1_TX and PWM2_CH0. |
| 90 | PA12 | bidirectional | GPIO pin muxable to PWM1_CH6, CAN1_RX and PWM2_CH1. |
| 91 | PA11 | bidirectional | GPIO pin muxable to PWM1_CH5, CAN1_STB, EIO_D1 and ACMP0_RRT. |
| 92 | PA10 | bidirectional | GPIO pin whose default function is JTAG_TDO, also PWM1_CH4 and EIO_D0. |
| 93 | PE1 | bidirectional | GPIO pin muxable to SPI0_SIN, SPI1_CS0 and PWM1_FLT1. |
| 94 | PE0 | bidirectional | GPIO pin muxable to SPI0_SCK, PWM_CLK1, SPI1_SOUT and PWM1_FLT2. |
| 95 | PC5 | bidirectional | GPIO pin whose default function is JTAG_TDI, also PWM2_CH0, RTC_CLKOUT and PWM2_CH1. |
| 96 | PC4 | bidirectional | GPIO pin whose default function is JTAG_TCLK (SWD clock), also ACMP0_IN2, PWM1_CH0, RTC_CLKOUT, EWDG_IN and PWM1_CH1. |
| 97 | PA5 | bidirectional | GPIO pin whose default function is RESET_b (external reset), also PWM_CLK1. |
| 98 | PA4 | bidirectional | GPIO pin whose default function is JTAG_TMS (SWD data), also ACMP0_OUT and EWDG_OUT_b. |
| 99 | PA9 | bidirectional | GPIO pin muxable to UART2_TX, SPI2_CS0, EIO_D7, PWM3_FLT2, PWM1_FLT3 and PWM4_FLT0. |
| 100 | PA8 | bidirectional | GPIO pin muxable to UART2_RX, SPI2_SOUT, EIO_D6, PWM3_FLT3 and PWM4_FLT1. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | AutoChips |
| Package | LQFP-100(14x14) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 100 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Digital supply voltage VDD1-VDD4 | VDD | -0.3 | 5.5 | V | 15 | ||
| Max current into VDD | IDD | 120 | mA | 15 | |||
| Input voltage (non open-drain) | VIN | -0.3 | V | max VDD + 0.1 | 15 | ||
| Single pin transient current | ID | -20 | 20 | mA | all port pins | 15 | |
| Storage temperature | TSTG | -55 | 150 | °C | 14 | ||
| Soldering temperature, lead-free | TSDR | 260 | °C | 14 | |||
| ESD HBM | VHBM | -4000 | 4000 | V | AEC-Q100-002 | 14 | |
| ESD CDM | VCDM | -750 | 750 | V | AEC-Q100-011 | 14 | |
| Latch-up current | ILAT | -100 | 100 | mA | 125°C ambient | 14 | |
| Operating voltage | VDD | 2.7 | 5.5 | V | 16 | ||
| ADC supply voltage | VAVDD | 2.7 | 5.5 | V | absolute | 34 | |
| Output low voltage | VOL | 0.8 | V | Iload=5, 20mA | 17 | ||
| Input leakage current | /IIn/ | -1 | 0.1 | 1 | µA | VIN=VDD or VSS | 17 |
| Pull-up resistance | RPU | 20 | 70 | kΩ | 2.7≤VDD<5.5V | 17 | |
| Pull-down resistance | RPD | 20 | 70 | kΩ | 2.7≤VDD<5.5V | 17 | |
| DC injection current, single pin | IIC | -3 | 3 | mA | VIN<VSS, VIN>VDD | 17 | |
| Input capacitance | CIn | 5 | 7 | pF | all pins | 17 | |
| POR reset voltage | VPOR | 1.6 | 1.8 | 2 | V | 17 | |
| LVD falling threshold, low range | VLVDL | 2.8 | 2.9 | 3 | V | 17 | |
| LVD falling threshold, high range | VLVDH | 4.4 | 4.5 | 4.65 | V | 18 | |
| LVR falling threshold | VLVRH | 2.5 | 2.6 | 2.7 | V | RUN/STOP/VLPR | 18 |
| LVR falling threshold (VLPS) | VLVRH | 1.97 | 2.22 | 2.44 | V | VLPS | 18 |
| Buffered bandgap output | VBG | 1.18 | 1.2 | 1.22 | V | VDD=5.0 V, 25°C | 18 |
| System and core clock frequency | fSys | 120 | MHz | 27 | |||
| Bus frequency | fBus | 60 | MHz | 28 | |||
| HSI output frequency | fHSI | 7.9 | 8 | 8.1 | MHz | -40 °C to 125°C | 32 |
| VHSI output frequency | fVHSI | 47.28 | 48 | 48.72 | MHz | -40 °C to 125°C | 32 |
| LSI output frequency | fLSI | 108 | 128 | 147 | KHz | -40 °C to 125°C | 32 |
| Oscillator frequency | fhi | 4 | 30 | MHz | 31 | ||
| ADC clock frequency | fADC | 30 | MHz | 34 | |||
| ADC integral nonlinearity | INL | -3 | 1.5 | 3 | LSB | 12bit | 34 |
| ADC differential nonlinearity | DNL | -1 | 1.5 | 3 | LSB | 12bit | 34 |
| ADC total unadjusted error | TUE | -8 | 8 | LSB | 12bit | 34 | |
| Comparator input offset voltage | VAIO | -30 | 30 | mV | 35 | ||
| Thermal resistance junction-ambient, 2-layer | θJA | 64.59 | °C/W | 100 LQFP, 1s1p, natural convection | 29 | ||
| Thermal resistance junction-ambient, 4-layer | θJA | 48.22 | °C/W | 100 LQFP, 2s2p, natural convection | 29 | ||
| Thermal resistance junction-board | θJB | 28.74 | °C/W | 100 LQFP | 29 | ||
| Thermal resistance junction-case | θJC | 16.3 | °C/W | 100 LQFP | 29 |
CAD (KiCad official)
- Symbol:
AC78406LGLA - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
ac78406lgla-etched.step/ac78406lgla-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ac78406lgla.step/ac78406lgla.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: AutoChips datasheet (55 pp, sha256
720d8820ca2ac87b, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).