component
AC6969A2
Public Made by Adomby adom
JieLi Tech Digital Signal Processors / Controllers (DSPs/DSCs), SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 4h ago |
| viewers | 4h ago |
| ac6969a2-etched.glb | 4h ago |
| ac6969a2-etched.step | 4h ago |
| ac6969a2-hero.glb | 4h ago |
| ac6969a2-hero.overlay.json | 4h ago |
| ac6969a2.glb | 4h ago |
| ac6969a2.kicad_mod | 4h ago |
| ac6969a2.kicad_sym | 4h ago |
| ac6969a2.lbr | 4h ago |
| ac6969a2.step | 4h ago |
| package.json | 4h ago |
| page.json | 4h ago |
| README.md | 4h ago |
| verification.json | 4h ago |
AC6969A2
JieLi Tech · Digital Signal Processors / Controllers (DSPs/DSCs) · SOP-16
AC6969A2 from JieLi Tech, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDDIO | power_out | 3.3V IO power (LDO output, typ 3.3V at VBAT=4.2V with 100mA loading). |
| 2 | VBAT | power_in | Battery power supply input, 2.2V to 5.5V (typ 3.7V). |
| 3 | LDO_IN/PB5 | bidirectional | Battery charger input (max 6.5V, 300mA loading) shared with high-voltage-resistant GPIO PB5 with 8mA drive, PWM3, CAP1 and UART0 C-port alternates. |
| 4 | BT_AVDD | power_out | Bluetooth power pin, 1.3V output at VBAT=4.2V with 100mA loading. |
| 5 | PB3 | bidirectional | GPIO with 24mA drive, alternate functions ADC6 input, PWM2 output and UART2RXB. |
| 6 | PB1 | bidirectional | GPIO with 24/8mA drive and default pull-up, used for long press reset, ADC5, TMR2 clock input and UART0RXB. |
| 7 | BT_RF | passive | Bluetooth antenna RF pin. |
| 8 | VSSIO | power_in | Ground. |
| 9 | BT_SOCI | input | Bluetooth oscillator input. |
| 10 | BT_SOCO | output | Bluetooth oscillator output. |
| 11 | USBDM/PC5 | bidirectional | USB negative data line with 4mA drive and default pull-down, shared with GPIO PC5 (24/8mA), IIC SDA, ADC14/ADC12, TMR1 and UART alternates. |
| 12 | USBDP/PA3/PA2 | bidirectional | USB positive data line with 4mA drive and default pull-down, shared with GPIOs PA3 and PA2 (24/8mA), IIC SCL, ADC13, UART1/UART2, PWM5, MIC_BIAS output and CAP3 alternates. |
| 13 | DACR | output | DAC right channel output. |
| 14 | DACL | output | DAC left channel output. |
| 15 | DACVSS | power_in | DAC ground. |
| 16 | PA1 | bidirectional | GPIO with 24/8mA drive, alternate functions MIC input, ADC1, PWM4 output and UART1RXC. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JieLi Tech |
| Package | SOP-16 |
| Category | Embedded Processors & Controllers |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient Temperature | Tamb | -40 | 85 | °C | 7 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 7 | ||
| Supply Voltage | VBAT | -0.3 | 4.5 | V | 7 | ||
| 3.3V IO Input Voltage | V3.3IO | -0.3 | V | 7 | |||
| LDO_IN Charge Input Voltage | -0.3 | 6.5 | V | 7 | |||
| Voltage Input | VBAT | 2.2 | 3.7 | 5.5 | V | 7 | |
| LDO_IN Loading current | 300 | mA | VBAT = 4.2V | 7 | |||
| Operating temperature | -40 | 85 | °C | 2 | |||
| Low-Level Output Voltage | VOL | 0.33 | V | VDDIO = 3.3V | 7 | ||
| High-Level Output Voltage | VOH | 2.7 | V | VDDIO = 3.3V | 7 | ||
| Internal pull-up/pull-down resistor accuracy | -20 | 20 | % | internal pull-up/pull-down resistance | 8 | ||
| DAC Output Power | 20 | mW | 32ohm loading | 8 | |||
| S/N | 90 | 91 | dB | Fsample=44.1kHz Fin=1KHz 1.2Vpp Input | 8 |
CAD (KiCad official)
- Symbol:
AC6969A2 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
ac6969a2-etched.step/ac6969a2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ac6969a2.step/ac6969a2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JieLi Tech datasheet (12 pp, sha256
86b787ff84faefa9, retrieved 2026-11-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).