# AC6328A2

**JieLi Tech** · Microcontrollers (MCU/MPU/SOC) · SOP-8

AC6328A2 from JieLi Tech, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | LDO power input (VBAT) for the chip's internal LDO; the datasheet gives no voltage limit for this pin. |
| 2 | PA9 | bidirectional | General-purpose I/O with internal 10K pull-up (default pull-up), selectable drive strength of 8 mA or 24 mA, also used for Long Press Reset and ADC Channel 8. |
| 3 | VSS | power_in | Ground reference pin. |
| 4 | BT_RF | passive | Bluetooth RF antenna connection. |
| 5 | BTOSCI | input | Bluetooth oscillator input (BTOSCI) pin. |
| 6 | BTOSCO | output | Bluetooth oscillator output (BTOSCO) pin. |
| 7 | USB0DM | bidirectional | USB D- signal, also usable as GPIO with internal 15K pull-down (default), 180K pull-up option at 4 mA drive, and as IIC_SDA_A, ADC Channel 11 and UART1_RXD. |
| 8 | USB0DP | bidirectional | USB D+ signal, also usable as GPIO with internal 15K pull-down (default), 1.5K pull-up option at 4 mA drive, and as IIC_SCL_A, ADC Channel 10 and UART1_TXD. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | JieLi Tech |
| Package | SOP-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating temperature | Topt | -40 |  | 85 | °C |  | 6 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 6 |
| 3.3V IO Input Voltage | VVDDIO | -0.3 |  | 3.6 | V |  | 6 |
| VDDIO Voltage Input | VDDIO | 1.8 | 3 | 3.4 | V |  | 6 |
| Low-Level Input Voltage | VIL | -0.3 |  |  | V | VDDIO = 3.3V | 6 |
| Low-Level Output Voltage | VOL |  |  | 0.33 | V | VDDIO = 3.3V | 6 |
| High-Level Output Voltage | VOH | 2.7 |  |  | V | VDDIO = 3.3V | 6 |

## CAD (KiCad official)

- Symbol: `AC6328A2`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `ac6328a2-etched.step` / `ac6328a2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ac6328a2.step` / `ac6328a2.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [JieLi Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903675433414656) (10 pp, sha256 `f59ca3a40f346640`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ac6328a2-datasheet.pdf)