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AC33M3064TLBN-01
Public Made by Adomby adom
ABOV Semicon Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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AC33M3064TLBN-01
ABOV Semicon · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
AC33M3064TLBN-01 from ABOV Semicon, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA0 | bidirectional | Port A bit 0 general-purpose I/O with pull-up and Schmitt-trigger input, default function after reset; also analog input AN0. |
| 2 | PA1 | bidirectional | Port A bit 1 general-purpose I/O with pull-up and Schmitt-trigger input, default function after reset; also analog input AN1. |
| 3 | PA2 | bidirectional | Port A bit 2 general-purpose I/O, default function after reset; alternate functions are WDTO watchdog timer overflow output and analog input AN2. |
| 4 | PA3 | bidirectional | Port A bit 3 general-purpose I/O, default function after reset; alternate functions are STBO stop mode output and analog input AN3. |
| 5 | PA6 | bidirectional | Port A bit 6 general-purpose I/O; alternate functions are T0IO and T2IO timer input/output and analog input AN6. |
| 6 | PA7 | bidirectional | Port A bit 7 general-purpose I/O; alternate functions are T1IO and T3IO timer input/output and analog input AN7. |
| 7 | PA8 | bidirectional | Port A bit 8 general-purpose I/O; alternate functions are T2IO and T0IO timer input/output and analog input AN8. |
| 8 | VDD | power_in | Power supply pin; the device operating voltage is 3.0 V to 5.5 V, and the ADC analog power is stated as 3.0 V to 5 V. |
| 9 | GND | power_in | Ground reference pin for the device. |
| 10 | PB0 | bidirectional | Port B bit 0 general-purpose I/O; alternate function is PWM0UH, MPWM 0 phase-U high-side output. |
| 11 | PB1 | bidirectional | Port B bit 1 general-purpose I/O; alternate function is PWM0UL, MPWM 0 phase-U low-side output. |
| 12 | PB2 | bidirectional | Port B bit 2 general-purpose I/O; alternate function is PWM0VH, MPWM 0 phase-V high-side output. |
| 13 | PB3 | bidirectional | Port B bit 3 general-purpose I/O; alternate function is PWM0VL, MPWM 0 phase-V low-side output. |
| 14 | PB4 | bidirectional | Port B bit 4 general-purpose I/O; alternate function is PWM0WH, MPWM 0 phase-W high-side output. |
| 15 | PB5 | bidirectional | Port B bit 5 general-purpose I/O; alternate function is PWM0WL, MPWM 0 phase-W low-side output. |
| 16 | PB6 | bidirectional | Port B bit 6 general-purpose I/O; alternate functions are PRTIN0, MPWM 0 protection input, and T0IO timer input/output. |
| 17 | PB7 | bidirectional | Port B bit 7 general-purpose I/O; alternate functions are OVIN0, MPWM 0 over-voltage input, and T1IO timer input/output. |
| 18 | PC0 | bidirectional | Port C bit 0 general-purpose I/O; alternate functions are TCK/SWCK (JTAG TCK / SWD clock input) and RXD1 (UART0 receive input as printed). |
| 19 | PC1 | bidirectional | Port C bit 1 general-purpose I/O; alternate functions are TMS/SWDIO (JTAG TMS / SWD data I/O) and TXD1 (UART0 transmit output as printed). |
| 20 | PC2 | bidirectional | Port C bit 2 general-purpose I/O; alternate functions are TDO/SWO (JTAG TDO / SWO output) and T8IO timer input/output. |
| 21 | PC11 | bidirectional | Port C bit 11 general-purpose I/O; BOOT input selects boot mode when driven low at reset (normal state high), and alternate function is T9IO. |
| 22 | PC10 | bidirectional | Port C bit 10 general-purpose I/O; nRESET is the external reset input with pull-up, and alternate function is T8IO. |
| 23 | GND | power_in | Ground reference pin for the device. |
| 24 | VDD | power_in | Power supply pin; the device operating voltage is 3.0 V to 5.5 V. |
| 25 | PC15 | bidirectional | Port C bit 15 general-purpose I/O; alternate functions are TXD0 (UART0 transmit output) and MISO0 (SPI0 master-in/slave-out, secondary port). |
| 26 | PC14 | bidirectional | Port C bit 14 general-purpose I/O; alternate functions are RXD0 (UART0 receive input) and MOSI0 (SPI0 master-out/slave-in, secondary port). |
| 27 | PC13 | bidirectional | Port C bit 13 general-purpose I/O; alternate function is XOUT, the external crystal oscillator output. |
| 28 | PC12 | bidirectional | Port C bit 12 general-purpose I/O; alternate function is XIN, the external crystal oscillator input (main OSC X-TAL 4 MHz to 8 MHz). |
| 29 | PD0 | bidirectional | Port D bit 0 general-purpose I/O; alternate functions are SS0 (listed as SPI1 slave select) and T8IO timer input/output. |
| 30 | PD1 | bidirectional | Port D bit 1 general-purpose I/O; alternate functions are SCK0 (SPI0 clock input/output) and T9IO timer input/output. |
| 31 | PD2 | bidirectional | Port D bit 2 general-purpose I/O; alternate functions are MOSI0 (SPI channel 0 master-out/slave-in) and SCL0 (I2C channel 0 clock). |
| 32 | PD3 | bidirectional | Port D bit 3 general-purpose I/O, default function after reset; alternate functions are MISO0 (SPI channel 0 master-in/slave-out) and SDA0 (I2C channel 0 data). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ABOV Semicon |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply (VDD) | VDD | -0.5 | 6 | V | 55 | ||
| Analog power supply (AVDD) | AVDD | -0.5 | 6 | V | 55 | ||
| Input main clock range | 0.4 | 8 | MHz | 55 | |||
| Operating frequency | 48 | MHz | 55 | ||||
| Storage temperature | TST | -55 | 125 | ℃ | 55 | ||
| Operating temperature | TOP | -40 | 105 | ℃ | 55 | ||
| Output low current per pin | IOL | 2.5 | mA | 55 | |||
| Output low current total | ∑ IOL | 25 | mA | 55 | |||
| Output high current per pin | IOH | -2.5 | mA | 55 | |||
| Output high current total | ∑ IOH | 25 | mA | 55 | |||
| Supply voltage | VDD | 3 | 5.5 | V | 56 | ||
| Supply voltage AVDD | AVDD | 3 | 5 | 5.5 | V | 56 | |
| Operating frequency (OSCMAIN) | f OSCMAIN | 4 | 8 | MHz | 56 | ||
| Operating frequency (OSCINT) | OSCINT | 1 | MHz | 56 | |||
| PLL operating frequency | 4 | 48 | MHz | 56 | |||
| Operating temperature | TOP | -40 | 105 | ℃ | 56 | ||
| Input high leakage | IIH | 4 | µA | 56 | |||
| Input low leakage | IIL | -4 | µA | 56 | |||
| Pull-up resistor | RPU | 30 | 70 | kΩ | RMAX:VDD=3.0V RMIN:VDD=5V | 56 | |
| Operating voltage (VDD18, POR) | VDD18 | 1.6 | 1.8 | 2 | V | 57 | |
| POR set level | VRISING | 1.3 | 1.4 | 1.55 | V | VDD rising (slow) | 57 |
| POR reset level | VFALLING | 1.1 | 1.2 | 1.4 | V | VDD falling (slow) | 57 |
| Operating voltage (LVD) | VDD | 1.7 | 5 | V | 57 | ||
| LVD set level 0 | VLVD0 | 1.6 | 1.8 | 2 | V | VDD falling (slow) | 57 |
| LVD set level 1 | VLVD1 | 2 | 2.2 | 2.5 | V | VDD falling (slow) | 57 |
| LVD set level 2 | VLVD2 | 2.5 | 2.7 | 3 | V | VDD falling (slow) | 57 |
| LVD set level 3 | VLVD3 | 3.9 | 4.3 | 4.6 | V | VDD falling (slow) | 57 |
| Operating voltage (VDC) | VDD | 3 | 5.5 | V | 57 | ||
| VDC output voltage | VOUT | 1.62 | 1.8 | 1.98 | V | @RUN | 57 |
| VDC output voltage | VOUT | 1.4 | 1.8 | 2 | V | @STOP | 57 |
| Regulation current | IOUT | 100 | mA | 57 | |||
| Drop-out voltage | VDROP | 200 | mV | VDD=3.0V IOUT=100mA | 57 | ||
| Current consumption (normal) | IDD | 100 | 150 | µA | NORM @RUN | 57 | |
| Current consumption (stop) | IDD | 1 | 2 | µA | STOP @STOP | 57 | |
| Operating voltage (External OSC) | VDD | 3 | 5.5 | V | 58 | ||
| External OSC operating current | IDD | 240 | µA | @4MHz/5V | 58 | ||
| External OSC frequency | fosc | 4 | 8 | 10 | MHz | 58 | |
| External OSC output voltage | VOUT | 1.2 | 2.4 | V | 58 | ||
| External OSC load capacitance | CL | 5 | 22 | 35 | pF | 58 | |
| Operating voltage (PLL) | VDD | 3 | 5.5 | V | 58 | ||
| PLL output frequency | fOUT | 4 | 48 | MHz | 58 | ||
| PLL operating current | IDD | 1.3 | mA | @50MHz | 58 | ||
| PLL duty | fDUTY | 40 | 60 | % | 58 | ||
| PLL P-P jitter | JITTER | 500 | Ps | @Lock | 58 | ||
| VCO frequency | VCO | 20 | 80 | MHz | 58 | ||
| PLL input frequency | fIN | 4 | 8 | MHz | 58 | ||
| PLL locking time | tLOCK | 1 | ms | 58 | |||
| ADC operating voltage | AVDD | 3 | 5 | 5.5 | V | 59 | |
| ADC reference voltage | AVREF | 3 | 5 | 5.5 | V | 59 | |
| ADC operating current | AIDD | 2.8 | mA | 59 | |||
| ADC conversion rate | 1.6 | Msps | 59 | ||||
| ADC operating frequency | fACLK | 25 | MHz | 59 | |||
| ADC integral nonlinearity | INL | -2.5 | 2.5 | LSB | 59 | ||
| ADC differential nonlinearity | DNL | -1 | 1 | LSB | 59 | ||
| ADC offset error | -1.5 | 1.5 | LSB | 59 | |||
| ADC full scale error | -1.5 | 1.5 | LSB | 59 | |||
| ADC SNDR | SNDR | 68 | dB | 59 | |||
| ADC THD | THD | -70 | dB | 59 |
CAD (KiCad official)
- Symbol:
AC33M3064TLBN-01 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
ac33m3064tlbn-01-etched.step/ac33m3064tlbn-01-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ac33m3064tlbn-01.step/ac33m3064tlbn-01.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ABOV Semicon datasheet (66 pp, sha256
f862bda4cb72de69, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).