main
Ray a6260kljtr-t: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 9c8293a 29d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "a6260kljtr-t",
  "title": "A6260KLJTR-T",
  "brief": "Allegro MicroSystems LLC LED Drivers, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "led drivers",
    "a6260kljtr-t"
  ],
  "component": {
    "mpn": "A6260KLJTR-T",
    "manufacturer": "Allegro MicroSystems LLC",
    "package": "SOIC-8-EP",
    "pin_count": 9,
    "category": "LED Drivers",
    "subcategory": "LED Drivers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586200212210008064",
    "parts": {
      "symbol": "a6260kljtr-t.kicad_sym",
      "footprint": "a6260kljtr-t.kicad_mod",
      "model_3d": "a6260kljtr-t-etched.glb",
      "model_3d_plain": "a6260kljtr-t.glb",
      "model_3d_step": "a6260kljtr-t-etched.step",
      "model_3d_step_plain": "a6260kljtr-t.step",
      "lbr": "a6260kljtr-t.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "SENSE",
        "type": "input",
        "description": "High-impedance LED current sense input. Connect independently to the top (LSS side) of the external sense resistor (R_S, 240 mΩ to 3 Ω). The internal regulator drives I_LC so that V_SENSE = V_SENREF (102 mV typ), setting I_LC = V_SENREF / R_S."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference. Connect directly to the negative supply as close as possible to the bottom (ground connection) of the sense resistor."
      },
      {
        "number": "3",
        "name": "THTH",
        "type": "input",
        "description": "Thermal threshold set input. Sets T_JM where the output current begins to derate with temperature (default ~105°C when open). A resistor from THTH to GND raises the threshold; a resistor from THTH to VIN lowers it; tying THTH to GND disables the thermal monitor."
      },
      {
        "number": "4",
        "name": "EN",
        "type": "input",
        "description": "Logic-level enable / PWM dimming input (V_IL ≤ 0.8 V, V_IH ≥ 2 V, up to 40 V absolute). Driving EN low (<400 mV) places the device in sleep mode with I_INS < 10 µA; PWM at EN dims the LED current with slew-limited transitions (t_r ≈ 80 µs, t_f ≈ 100 µs)."
      },
      {
        "number": "5",
        "name": "VIN",
        "type": "power_in",
        "description": "Main supply input for the control circuit and high-side switch. Operating range 6 to 40 V (functional down to ~7 V for full-spec, absolute max −14 to +40 V). Bypass with a small (~100 nF) ceramic capacitor close to VIN and GND."
      },
      {
        "number": "6",
        "name": "LA",
        "type": "output",
        "description": "LED-Anode output: switched, current-limited high-side source connected to the anode of the LED string. Includes overcurrent protection (I_LAOC ≈ −500 mA trip) with t_OCD ≈ 3 µs shutdown for short-to-ground detection."
      },
      {
        "number": "7",
        "name": "LC",
        "type": "output",
        "description": "LED-Cathode output: regulated low-side current sink connected to the cathode of the LED string (I_LC up to 350 mA, ±4% accuracy). Includes short-circuit release monitor (V_SCCR ≈ 1.2 V) and I_SCU short-circuit source current."
      },
      {
        "number": "8",
        "name": "LSS",
        "type": "passive",
        "description": "Low-Side Sense: bottom of the internal current sink, connected to power ground through the external sense resistor R_S (240 mΩ to 3 Ω). The V(LSS−GND) drop across R_S is regulated to V_SENREF (102 mV typ) to program I_LC."
      },
      {
        "number": "9",
        "name": "PAD",
        "type": "passive",
        "description": "Exposed thermal pad on the package underside for enhanced heat dissipation (R_θJP ≈ 2 °C/W). Solder to the PCB ground copper for optimum thermal performance."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586200212210008064",
        "pages": 12,
        "sha256": "d5aac5415d3aef69",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 9,
        "described": 9,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "a6260kljtr-t.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.55
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2d6f7e774e8143e3320cbd59eb5be9f3b7864614644e3b072006e1eb05fb7fa6",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "a6260kljtr-t-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.55
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "fbb3018de1b05ccae3e2552263d0627fb3d66613b12e09b5cc1aa1fe8d306c9a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Allegro MicroSystems LLC",
      "Package": "SOIC-8-EP",
      "Category": "LED Drivers",
      "Pins": "9"
    }
  },
  "variants": [
    {
      "mpn": "A6260KLJTR-T",
      "kind": "packaging"
    },
    {
      "mpn": "A6260KLJTR-TSLJTR-T",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "a6260kljtr-t"
  ],
  "discovery_pitch": "A6260KLJTR-T (Allegro MicroSystems LLC) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "a6260kljtr-t.kicad_sym",
    "a6260kljtr-t.kicad_mod",
    "a6260kljtr-t.glb",
    "a6260kljtr-t.step",
    "a6260kljtr-t.lbr",
    "docs/hero.png",
    "docs/a6260kljtr-t-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T15:28:00.545Z"
}