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A5995GEVSR-T

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Allegro MicroSystems, LLC Motor Driver ICs, QFN-36(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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A5995GEVSR-T

Allegro MicroSystems, LLC · Motor Driver ICs · QFN-36(6x6)

A5995GEVSR-T from Allegro MicroSystems, LLC, in a QFN-36(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connect; the datasheet assigns no electrical function to this pin.
2 OUT1A output DMOS full-bridge 1 output A, driving the bridge 1 motor winding with up to 3.2 A continuous DC motor current.
3 SENSE1 passive Sense resistor terminal for bridge 1; the sense voltage must not exceed the ±500 mV SENSEx maximum rating.
4 OUT1B output DMOS full-bridge 1 output B, driving the bridge 1 motor winding with up to 3.2 A continuous DC motor current.
5 VBB power_in Load supply voltage; the operating range is 8 V to 40 V.
6 OUT1B output DMOS full-bridge 1 output B, driving the bridge 1 motor winding with up to 3.2 A continuous DC motor current.
7 SENSE1 passive Sense resistor terminal for bridge 1; the sense voltage must not exceed the ±500 mV SENSEx maximum rating.
8 OUT1A output DMOS full-bridge 1 output A, driving the bridge 1 motor winding with up to 3.2 A continuous DC motor current.
9 NC unconnected No connect; the datasheet assigns no electrical function to this pin.
10 PHASE2 input Control input that sets the direction of rotation of motor 2 in combination with ENABLE2 and PWM.
11 SLEEPn input Active-low sleep mode input; pulling it low puts the device in sleep mode, which disables much of the internal circuitry including the charge pump.
12 NC unconnected No connect; the datasheet assigns no electrical function to this pin.
13 VREF1 input Analog reference input for bridge 1 current trip level; the operating input range is 0 V to 1.5 V.
14 VREF2 input Analog reference input for bridge 2 current trip level; the operating input range is 0 V to 1.5 V.
15 NC unconnected No connect; the datasheet assigns no electrical function to this pin.
16 GND power_in Ground.
17 PHASE1 input Control input that sets the direction of rotation of motor 1 in combination with ENABLE1 and PWM.
18 GND power_in Ground.
19 NC unconnected No connect; the datasheet assigns no electrical function to this pin.
20 OUT2A output DMOS full-bridge 2 output A, driving the bridge 2 motor winding with up to 3.2 A continuous DC motor current.
21 SENSE2 passive Sense resistor terminal for bridge 2; the sense voltage must not exceed the ±500 mV SENSEx maximum rating.
22 OUT2B output DMOS full-bridge 2 output B, driving the bridge 2 motor winding with up to 3.2 A continuous DC motor current.
23 VBB power_in Load supply voltage; the operating range is 8 V to 40 V.
24 OUT2B output DMOS full-bridge 2 output B, driving the bridge 2 motor winding with up to 3.2 A continuous DC motor current.
25 SENSE2 passive Sense resistor terminal for bridge 2; the sense voltage must not exceed the ±500 mV SENSEx maximum rating.
26 OUT2A output DMOS full-bridge 2 output A, driving the bridge 2 motor winding with up to 3.2 A continuous DC motor current.
27 MODE2 input Control input that selects fast or slow current decay for bridge 2 (logic high selects slow decay).
28 MODE1 input Control input that selects fast or slow current decay for bridge 1 (logic high selects slow decay).
29 NC unconnected No connect; the datasheet assigns no electrical function to this pin.
30 GND power_in Ground.
31 VCP power_out Reservoir capacitor terminal; a 0.1 µF ceramic capacitor is required between VCP and VBB.
32 CP1 passive Charge pump capacitor terminal; a 0.1 µF ceramic capacitor is connected between CP1 and CP2.
33 CP2 passive Charge pump capacitor terminal; a 0.1 µF ceramic capacitor is connected between CP1 and CP2.
34 GND power_in Ground.
35 ENABLE1 input Control input that enables bridge 1 and, together with PHASE1 and PWM, controls motor 1 commutation.
36 ENABLE2 input Control input that enables bridge 2 and, together with PHASE2 and PWM, controls motor 2 commutation.
37 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Allegro MicroSystems, LLC
Package QFN-36(6x6)
Category Power Management ICs
Pins 37

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Load Supply Voltage VBB -0.5 40 V 2
Output Current (DC motor driver, continuous) IOUT 3.2 A DC motor driver, continuous 2
Logic Input Voltage Range VIN -0.3 7 V 2
SENSEx Pin Voltage VSENSEx 0.5 V 2
SENSEx Pin Voltage (pulsed) VSENSEx 2.5 V Pulsed tw < 1 µs 2
VREFx Pin Voltage VREFx 2.5 V 2
Operating Temperature Range TA -40 105 °C Range G 2
Junction Temperature TJ(max) 150 °C 2
Storage Temperature Range Tstg -55 150 °C 2
Package Thermal Resistance RθJA 27 °C/W EV package, 4-layer PCB based on JEDEC standard 2
Load Supply Voltage Range VBB 8 40 V Operating 4
Output On-Resistance (source driver) RDS(on) 250 300 mΩ IOUT = -1.2 A, TJ = 25°C 4
Output On-Resistance (sink driver) RDS(on) 240 300 mΩ Sink driver, IOUT = 1.2 A, TJ = 25°C 4
Output Diode Forward Voltage Vf 1.2 V Outputs, IOUT = 1.2 A 4
Output Leakage IDSS -20 20 µA Outputs, VOUT = 0 to VBB 4
VBB Supply Current (outputs on) IBB 23 mA IOUT = 0 mA, outputs on, fPWM = 50 kHz, duty cycle = 50% 4
VBB Supply Current (outputs off) IBB 11.7 14 mA Outputs off 4
VBB Supply Current (sleep mode) IBB -10 10 µA Sleep mode 4
Output Driver Slew Rate SROUT 50 100 150 ns 10% to 90% 4
Logic Input Voltage (high) VIN(1) 2 V 4
Logic Input Voltage (low) VIN(0) 0.8 V 4
Logic Input Current IIN -20 20 µA VIN = 0 to 5 V 4
Input Hysteresis Vhys 150 300 500 mV 4
Sleep Rising Threshold VSLEEPn(r) 2.5 2.7 2.95 V 4
Sleep Falling Threshold VSLEEPn(f) 2.4 V 4
Sleep Hysteresis VSLEEPn(hys) 250 325 450 mV 4
Sleep Input Current ISLEEPn 100 150 µA 4
Propagation Delay, PWM change to source on tpd 550 700 1000 ns PWM change to source on 4
Propagation Delay, PWM change to source off tpd 35 450 ns PWM change to source off 4
Propagation Delay, PWM change to sink on tpd 550 700 1000 ns PWM change to sink on 4
Propagation Delay, PWM change to sink off tpd 35 450 ns PWM change to sink off 4
Crossover Delay tCD 250 425 1000 ns 4
Blank Time (DC motor driver) tBLANK 2.5 3.2 4 µs 4
VREFx Pin Input Voltage Range VREFx 0 1.5 V Operating 4
VREFx Pin Reference Input Current IREF -1 1 µA VREF = 1.5 V 4
Current Trip-Level Error VERR -5 5 % VREF = 1.5 V 4
VBB UVLO Threshold VUV(VBB) 7.3 7.6 7.9 V VBB rising 4
VBB UVLO Hysteresis VUV(VBB)hys 400 500 600 mV 4
Overcurrent Protection Threshold IOVP 3.2 A 4
Thermal Shutdown Temperature TJTSD 155 165 175 °C 4
Thermal Shutdown Hysteresis TJTSDhys 15 °C 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin The package is lead (Pb) free, with 100% matte-tin leadframe plating. A5995-DS, Rev. 2 1

CAD (KiCad official)

  • Symbol: A5995GEVSR-T
  • Footprint: Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
  • 3D model: QFN-36(6x6) (KiCad packages3D, STEP)
  • 3D model files: a5995gevsr-t-etched.step / a5995gevsr-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); a5995gevsr-t.step / a5995gevsr-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allegro MicroSystems, LLC datasheet (12 pp, sha256 49b355b43113d337, retrieved 2026-10-29, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF