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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

A5976GLPTR-T

Allegro MicroSystems LLC · Global Sourcing Parts · TSSOP-28-EP

A5976GLPTR-T from Allegro MicroSystems LLC, in a TSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SENSE1	passive	Current-sense resistor connection for bridge 1, where the DC SENSE voltage must not exceed 0.5 V.
2	FAULTn	output	Open-drain fault output that is pulled low when an overcurrent condition exists, latched until RESETn or a VBB power cycle.
3	DIR	input	Logic input whose state sets the direction of motor rotation.
4	OUT1A	output	Output A of DMOS full-bridge 1, driving the bipolar stepper motor winding.
5	PFD	input	Analog input selecting decay mode: above 0.6×VDD selects slow decay, below 0.21×VDD selects fast decay, and it should be decoupled with a 0.1 µF capacitor.
6	RC1	input	Analog fixed off-time timing terminal for bridge 1, with off-time set by external RT and CT to ground (RT 12 kΩ to 100 kΩ, CT 470 pF to 1500 pF).
7	AGND	power_in	Analog ground, which must be connected externally together with PGND and the thermal pad.
8	REF	input	Gm reference voltage input that sets the current limit; VREF should not exceed 4 V except in full-step mode, where it can go up to VDD.
9	RC2	input	Analog fixed off-time timing terminal for bridge 2, with off-time set by external RT and CT to ground (RT 12 kΩ to 100 kΩ, CT 470 pF to 1500 pF).
10	VDD	power_in	Logic supply voltage, operating range 3 to 5.5 V.
11	OUT2A	output	Output A of DMOS full-bridge 2, driving the bipolar stepper motor winding.
12	MS2	input	Logic input that selects microstep resolution together with MS1 (L,L full step; L,H half step; H,L quarter step; H,H sixteenth step), latched on the STEP command.
13	MS1	input	Logic input that selects microstep resolution together with MS2, with changes taking effect only at the next STEP command.
14	SENSE2	passive	Current-sense resistor connection for bridge 2, where the DC SENSE voltage must not exceed 0.5 V.
15	VBB2	power_in	Load supply for bridge 2, operating range 8 to 40 V.
16	DECAY	input	Logic input that, when high, forces slow decay on steps where DAC levels increase or stay equal and otherwise uses the PFD setting; when low, decay is always set by PFD.
17	RESETn	input	Active-low logic input that sets the translator to the home state and turns off all DMOS outputs, with STEP inputs ignored until it returns high.
18	OUT2B	output	Output B of DMOS full-bridge 2, driving the bipolar stepper motor winding.
19	STEP	input	Logic input where a low-to-high transition advances the motor one microstep, requiring a minimum high and low pulse width of 1 µs.
20	VREG	power_out	Internally generated regulator voltage for the sink-side DMOS gates, to be decoupled with a 0.22 µF capacitor to ground.
21	PGND	power_in	Power ground, which must be connected externally together with GND and the thermal pad.
22	VCP	power_out	Charge-pump reservoir capacitor terminal, requiring a 0.22 µF ceramic capacitor between VCP and VBB.
23	CP1	passive	Charge-pump capacitor terminal, requiring a 0.22 µF ceramic capacitor between CP1 and CP2.
24	CP2	passive	Charge-pump capacitor terminal, requiring a 0.22 µF ceramic capacitor between CP1 and CP2.
25	OUT1B	output	Output B of DMOS full-bridge 1, driving the bipolar stepper motor winding.
26	ENABLEn	input	Active-low logic input that enables all DMOS outputs, with outputs disabled when logic-high.
27	SLEEPn	input	Active-low logic input for sleep mode, where a logic-high allows normal operation and 1 ms is required after wakeup before a STEP command.
28	VBB1	power_in	Load supply for bridge 1, operating range 8 to 40 V.
29	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Allegro MicroSystems LLC
Package	TSSOP-28-EP
Category	Global Sourcing Parts
Pins	29

CAD (KiCad official)

Symbol: A5976GLPTR-T
Footprint: Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm
3D model: TSSOP-28-EP (KiCad packages3D, STEP)
3D model files: a5976glptr-t-etched.step / a5976glptr-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); a5976glptr-t.step / a5976glptr-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Allegro MicroSystems LLC datasheet (16 pp, sha256 9f6d952911c0119c, retrieved 2026-10-09, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF