component

A5973D013TR

Public Made by Adom

by adom

STMicroelectronics DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)a5973d013trfactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 11h ago
viewers a5973d013tr: viewers · Ray 11h ago
a5973d013tr-etched.glb a5973d013tr: factory component page (tier=lcsc) · Ray 11h ago
a5973d013tr-etched.step a5973d013tr: factory component page (tier=lcsc) · Ray 11h ago
a5973d013tr-hero.glb a5973d013tr: hero GLB from the etched model (keeps the MPN mark) · Ray 11h ago
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a5973d013tr.glb Publish 0.1.0 · Ray 11h ago
a5973d013tr.kicad_mod Publish 0.1.0 · Ray 11h ago
a5973d013tr.kicad_sym Publish 0.1.0 · Ray 11h ago
a5973d013tr.lbr Publish 0.1.0 · Ray 11h ago
a5973d013tr.step Publish 0.1.0 · Ray 11h ago
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README.md Initial commit: component/a5973d013tr · Ray 11h ago

A5973D013TR

STMicroelectronics · DC-DC Converters · SOIC-8

A5973D013TR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulator output; the OUT pin DC voltage is rated -1 V to 40 V (-5 V to 40 V peak at t = 0.1 s), and maximum output current is limited internally.
2 SYNCH input Master/slave synchronization input with an absolute range of -0.3 V to 4 V, where a high input needs at least 2.5 V (VREF) and a low input must be 0.74 V or less.
3 INH input Active-high logic inhibit that disables the device when above 2.2 V and enables it below 0.8 V; it must be grounded if unused, and when left open an internal pull-up disables the device.
4 COMP passive Error amplifier output used for frequency compensation of the control loop.
5 FB input Feedback input with an analog pin rating of 4 V; connecting it directly to the output gives 1.23 V, and an external resistive divider is required for higher output voltages.
6 VREF power_out 3.3 V (±2%) reference voltage output that needs no capacitor for stability.
7 GND power_in Ground reference for the device; the exposed pad should be connected to an extended ground plane to reduce thermal resistance.
8 VCC power_in Unregulated DC input voltage, operating from 4 V to 36 V with an absolute maximum of 40 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: A5973D013TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: a5973d013tr-etched.step / a5973d013tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); a5973d013tr.step / a5973d013tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (41 pp, sha256 5e62fdca926dc75a, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF