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Initial commit: component/a5973d013tr

Ray ·5efb6028b6 ·12h ago
2 files changed +244
README.mdadded+44
@@ -0,0 +1,44 @@+# A5973D013TR++**STMicroelectronics** · DC-DC Converters · SOIC-8++A5973D013TR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT | power_out | Regulator output; the OUT pin DC voltage is rated -1 V to 40 V (-5 V to 40 V peak at t = 0.1 s), and maximum output current is limited internally. |+| 2 | SYNCH | input | Master/slave synchronization input with an absolute range of -0.3 V to 4 V, where a high input needs at least 2.5 V (VREF) and a low input must be 0.74 V or less. |+| 3 | INH | input | Active-high logic inhibit that disables the device when above 2.2 V and enables it below 0.8 V; it must be grounded if unused, and when left open an internal pull-up disables the device. |+| 4 | COMP | passive | Error amplifier output used for frequency compensation of the control loop. |+| 5 | FB | input | Feedback input with an analog pin rating of 4 V; connecting it directly to the output gives 1.23 V, and an external resistive divider is required for higher output voltages. |+| 6 | VREF | power_out | 3.3 V (±2%) reference voltage output that needs no capacitor for stability. |+| 7 | GND | power_in | Ground reference for the device; the exposed pad should be connected to an extended ground plane to reduce thermal resistance. |+| 8 | VCC | power_in | Unregulated DC input voltage, operating from 4 V to 36 V with an absolute maximum of 40 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `A5973D013TR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `a5973d013tr-etched.step` / `a5973d013tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `a5973d013tr.step` / `a5973d013tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588924473815289856) (41 pp, sha256 `5e62fdca926dc75a`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/a5973d013tr-datasheet.pdf)
page.jsonadded+200
@@ -0,0 +1,200 @@+{+  "slug": "a5973d013tr",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "a5973d013tr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "a5973d013tr.kicad_sym",+    "a5973d013tr.kicad_mod",+    "a5973d013tr.glb",+    "a5973d013tr.step",+    "a5973d013tr.lbr",+    "docs/hero.png",+    "docs/a5973d013tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "a5973d013tr-hero.glb",+    "a5973d013tr-hero.overlay.json"+  ],+  "component": {+    "mpn": "A5973D013TR",+    "manufacturer": "STMicroelectronics",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588924473815289856",+    "parts": {+      "symbol": "a5973d013tr.kicad_sym",+      "footprint": "a5973d013tr.kicad_mod",+      "model_3d": "a5973d013tr-hero.glb",+      "model_3d_plain": "a5973d013tr.glb",+      "model_3d_step": "a5973d013tr-etched.step",+      "model_3d_step_plain": "a5973d013tr.step",+      "lbr": "a5973d013tr.lbr"+    },+    "distributor_links": {+      "lcsc": "C2070810",+      "digikey": "497-10187-2-ND",+      "mouser": "511-A5973D013TR"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T19:20:15Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "497-10187-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "511-A5973D013TR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "OUT",+        "type": "power_out",+        "description": "Regulator output; the OUT pin DC voltage is rated -1 V to 40 V (-5 V to 40 V peak at t = 0.1 s), and maximum output current is limited internally."+      },+      {+        "number": "2",+        "name": "SYNCH",+        "type": "input",+        "description": "Master/slave synchronization input with an absolute range of -0.3 V to 4 V, where a high input needs at least 2.5 V (VREF) and a low input must be 0.74 V or less."+      },+      {+        "number": "3",+        "name": "INH",+        "type": "input",+        "description": "Active-high logic inhibit that disables the device when above 2.2 V and enables it below 0.8 V; it must be grounded if unused, and when left open an internal pull-up disables the device."+      },+      {+        "number": "4",+        "name": "COMP",+        "type": "passive",+        "description": "Error amplifier output used for frequency compensation of the control loop."+      },+      {+        "number": "5",+        "name": "FB",+        "type": "input",+        "description": "Feedback input with an analog pin rating of 4 V; connecting it directly to the output gives 1.23 V, and an external resistive divider is required for higher output voltages."+      },+      {+        "number": "6",+        "name": "VREF",+        "type": "power_out",+        "description": "3.3 V (±2%) reference voltage output that needs no capacitor for stability."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for the device; the exposed pad should be connected to an extended ground plane to reduce thermal resistance."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Unregulated DC input voltage, operating from 4 V to 36 V with an absolute maximum of 40 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Package hint 'SOIC-8' does not appear in the datasheet. The only 8-pin package given is HSOP8 (expos; Pin numbers and names come from Table 1 (Pin description) on page 4. The pin connection figure (Figu; Pin 5 (FB) description cites 1.23 V from Table 1, while the electrical characteristics give a 1.235 "+        ],+        "pages_sent": 12,+        "cost_usd": 0.0522,+        "at": "2026-10-08T19:19:53"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588924473815289856",+        "pages": 41,+        "sha256": "5e62fdca926dc75a",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "a5973d013tr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "a5973d013tr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "7efa04f6d7d4e6beab21f87864e37b971124a633887b8131c77e784a3ed39554",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file