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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	22d ago
viewers	a5970adtr: viewers · Ray	22d ago
a5970adtr-etched.glb	a5970adtr: factory component page (tier=lcsc) · Ray	22d ago
a5970adtr-etched.step	a5970adtr: factory component page (tier=lcsc) · Ray	22d ago
a5970adtr-hero.glb	a5970adtr: hero GLB from the etched model (keeps the MPN mark) · Ray	22d ago
a5970adtr-hero.overlay.json	Publish 0.1.0 · Ray	22d ago
a5970adtr.glb	Publish 0.1.0 · Ray	22d ago
a5970adtr.kicad_mod	Publish 0.1.0 · Ray	22d ago
a5970adtr.kicad_sym	Publish 0.1.0 · Ray	22d ago
a5970adtr.lbr	Publish 0.1.0 · Ray	22d ago
a5970adtr.step	Publish 0.1.0 · Ray	22d ago
package.json	Publish 0.1.0 · Ray	22d ago
page.json	a5970adtr: specified limits as data (metadata.characteristics, 39 rows from the datasheet) · Ray	17d ago
README.md	a5970adtr: specified limits as data (metadata.characteristics, 39 rows from the datasheet) · Ray	17d ago

A5970ADTR

STMicroelectronics · DC-DC Converters · SO-8

A5970ADTR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OUT	power_out	Regulator output; the OUT pin DC voltage is rated -1 to 40 V, with a peak of -5 to 40 V at t = 0.1 s.
2	SYNCH	input	Master/slave synchronization pin; it requires a high input of at least 2.5 V and a low input of at most 0.74 V, with absolute maximum range -0.3 to 4 V.
3	INH	input	Active-high inhibit that disables the device (device OFF above 2.2 V, ON below 0.8 V); it must be grounded if unused, and an internal pull-up disables the device when it is open.
4	COMP	output	Error amplifier output used for frequency compensation of the loop.
5	FB	input	Feedback input; connecting it directly to the output sets 1.23 V output, an external resistive divider is required for higher voltages, and analog pins are rated up to 4 V.
6	VREF	power_out	3.3 V reference voltage output (±2%) that requires no capacitor for stability.
7	GND	power_in	Ground reference for the device.
8	VCC	power_in	Unregulated DC input voltage with an operating range of 4 to 36 V and an absolute maximum of 40 V.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	SO-8
Category	Power Management (PMIC)
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input voltage	V8			40	V		5
OUT pin DC voltage	V1	-1		40	V		5
OUT pin peak voltage	V1	-5		40	V	t = 0.1 s	5
Analog pins	V4, V5			4	V		5
INH pin voltage	V3	-0.3			V		5
SYNCH pin voltage	V2	-0.3		4	V		5
Power dissipation	PTOT			0.6	W	TA 70 °C	5
Operating junction temperature range	TJ	-40		150	°C		5
Storage temperature range	TSTG	-55		150	°C		5
Maximum thermal resistance junction ambient	RthJA			120	°C/W	Package mounted on evaluation board	5
Operating input voltage range	VCC	4		36	V		6
MOSFET on resistance	RDS(on)		0.25	0.5			6
Maximum limiting current	IL	1.35		1.8	A	VCC = 5 V	6
Maximum limiting current	IL	1.5		1.8	A	VCC = 5 V, TJ = 25 °C	6
Switching frequency	fSW	430	500	570	kHz		6
Duty cycle		0		100	%		6
Voltage feedback	V5	1.198	1.235	1.272	V	4.4 V < VCC < 36 V	6
Total operating quiescent current	Iqop		5	7	mA		6
Quiescent current	Iq		2.7		mA	Duty cycle = 0; VFB = 1.5 V	6
Total standby quiescent current	Iqst-by		50	100	µA	Vinh > 2.2 V	6
INH threshold voltage, device ON				0.8	V	Device ON	6
INH threshold voltage, device OFF		2.2			V	Device OFF	6
High level output voltage	VOH	3.5			V	VFB = 1 V	6
Low level output voltage	VOL			0.4	V	VFB = 1.5 V	6
Source output current	Io source		190	300	µA	VCOMP = 1.9 V; VFB = 1 V	6
Sink output current	Io sink		1	1.5	mA	VCOMP = 1.9 V; VFB = 1.5 V	6
Source bias current	Ib		2.5	4	µA		6
DC open loop gain			57		dB	RL = 50	6
Transconductance	gm		2.3		mS	ICOMP = -0.1 mA to 0.1 mA; VCOMP = 1.9 V	6
Synch high input voltage		2.5			V	VCC = 4.4 to 36 V	6
Synch low input voltage				0.74	V	VCC = 4.4 to 36 V	6
Slave synch current			0.11	0.25	mA	Vsynch = 0.74 V	6
Slave synch current			0.21	0.45	mA	Vsynch = 2.33 V	6
Master output amplitude		2.75	3		V	Isource = 3 mA	7
Output pulse width			0.2	0.35	µs	no load, Vsynch = 1.65 V	7
Reference voltage		3.2	3.3	3.399	V	IREF = 0 to 5 mA; VCC = 4.4 V to 36 V	7
Line regulation			5	10	mV	IREF = 0 mA; VCC = 4.4 V to 36 V	7
Load regulation			8	15	mV	IREF = 0 mA	7
Short-circuit current		5	18	35	mA		7

CAD (KiCad official)

Symbol: A5970ADTR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8 (KiCad packages3D, STEP)
3D model files: a5970adtr-etched.step / a5970adtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); a5970adtr.step / a5970adtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (42 pp, sha256 351925c80d2f3515, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF