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A5947KLPTR-B-T

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Allegro MicroSystems, LLC Brushless DC (BLDC) Motor Driver, TSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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A5947KLPTR-B-T

Allegro MicroSystems, LLC · Brushless DC (BLDC) Motor Driver · TSSOP-20-EP

A5947KLPTR-B-T from Allegro MicroSystems, LLC, in a TSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground.
2 n/c unconnected No connect.
3 n/c unconnected No connect.
4 CP1 passive Charge pump capacitor connection (CP1 rated -0.3 to VBB + 0.3 V).
5 CP2 passive Charge pump capacitor connection (CP2 rated VBB - 0.3 to VCP + 0.3 V).
6 VCP passive Charge pump capacitor/output pin, rated VBB - 0.3 to VBB + 8 V, typically 7.2 V above VBB at VBB = 8 V.
7 VBB power_in Input supply, operating 4 to 40 V (absolute maximum -0.7 to 40 V).
8 n/c unconnected No connect.
9 OUTA output Motor terminal A, absolute maximum VBB + 1 V, output current up to 3.6 A.
10 LSS passive Low side source connection of the power drivers.
11 OUTB output Motor terminal B, absolute maximum VBB + 1 V, output current up to 3.6 A.
12 OUTC output Motor terminal C, absolute maximum VBB + 1 V, output current up to 3.6 A.
13 n/c unconnected No connect.
14 n/c unconnected No connect.
15 VREF power_out Reference voltage output, 3.3 V typ (3.15 to 3.45 V) for 0 to 20 mA load.
16 n/c unconnected No connect.
17 TEST output Open-drain logic output, low when motor off and high at end of open loop startup, rated -0.3 to 6 V.
18 nFAULT output Active-low output indicating VBB undervoltage, VBB overvoltage, thermal shutdown, VCP undervoltage, rotor lock and output VDS (OCP) faults.
19 SPD input Speed demand input by PWM duty or analog voltage (0 to 6 V abs max, 9-bit ADC), also serves as I2C clock SCL.
20 FG bidirectional Open-drain speed output representing motor speed, also serves as I2C data line SDA.
21 PAD passive Exposed pad for enhanced thermal dissipation.

Key specifications

Parameter Value
Manufacturer Allegro MicroSystems, LLC
Package TSSOP-20-EP
Category Motor Driver ICs
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VBB Supply Current, active IBB 13.5 15 mA Active mode (PWM duty < DC_ON) 4
VBB Supply Current, standby IBBS 10 40 µA VBB = 34 V, standby mode 4
Reference Voltage VREF 3.15 3.3 3.45 V I = 0 to 20 mA, VBB = 6 to 40 V 4
Charge Pump VCP VCP 6.5 7.2 7.7 V Relative to VBB, VBB = 8 V 4
Charge Pump VCP VCP 3.5 3.7 V Relative to VBB, VBB = 4 V 4
Total Driver On-Resistance RDS(ON) 760 860 mΩ I = 1.5 A, TJ = 125°C, VBB = 12 V 4
Total Driver On-Resistance RDS(ON) 950 1200 mΩ I = 1.5 A, TJ = 125°C, VBB = 4 V 4
Total Driver On-Resistance RDS(ON) 510 mΩ I = 1.5 A, TJ = 25°C, VBB = 12 V 4
Total Driver On-Resistance RDS(ON) 680 mΩ I = 1.5 A, TJ = 25°C, VBB = 4 V 4
Source Driver On-Resistance RDS(ON)SRC 380 mΩ TJ = 125°C, VBB = 12 V 4
Sink Driver On-Resistance RDS(ON)SNK 380 mΩ TJ = 125°C, VBB = 12 V 4
Motor PWM Frequency fPWM 23.52 24.5 25.48 kHz TA = 25°C to 125°C 4
Motor PWM Frequency fPWM 23.03 25.97 kHz TA = -40°C to 125°C 4
PWM Input Frequency Range fPWMIN 34 65000 Hz 4
Duty Cycle On Threshold DCON -0.5 0.5 % Relative to target 4
Duty Cycle Off Threshold DCOFF -0.5 0.5 % Relative to target 4
SPD Standby Threshold (Analog) VSPDTH 0.43 0.7 1 V 4
SPD On Threshold VSPDON 210 240 270 mV DCON = 10% 4
SPD Off Threshold VSPDOFF 160 190 220 mV DCOFF = 8% 4
SPD ADC Accuracy SPDACC -10 10 LSB VBB = 12 V, VSPD = 0.2 V to VSPDMAX 4
Speed Setpoint fSPD -5 5 % Duty cycle input; TA = 25°C to 125°C 4
Speed Setpoint fSPD -7 7 % Duty cycle input; TA = -40°C to 125°C 4
SPD Max VSPDMAX 2.49 V 4
SPD ADC Resolution VSPDLSB 4.892 mV 4
Lock Timing tLOCK -5 5 % Relative to target 5
VBB Undervoltage Threshold VBBUVLO 3.7 3.85 4 V UVLO = 0, VBB rising 5
VBB Undervoltage Threshold VBBUVLO 8.4 8.65 9.02 V UVLO = 1, VBB rising 5
VBB Undervoltage Hysteresis VBBHYS 160 300 480 mV UVLO = 0 5
VBB Undervoltage Hysteresis VBBHYS 1.8 2 2.2 V UVLO = 1 5
Overcurrent Limit IOCL 2.5 3 3.5 A VBB = 8 V 5
Overcurrent Protection IOCP 3.94 7 A 5
VBB Overvoltage VBBOV 18.2 19 19.8 V VBBOV = 0, VBB rising 5
VBB Overvoltage VBBOV 36.8 37.5 39.3 V VBBOV = 1, VBB rising 5
VBB Overvoltage Hysteresis VBBOVHYS 1.5 2 2.5 V 5
VREF UVLO VREFUVLO 2.9 3 3.15 V VREF rising 5
VREF UVLO Hysteresis VREFHYS 150 250 350 mV 5
VREF Overcurrent Limit VREFOCL 30 65 120 mA VBB = 12 V 5
VCP UVLO VCPUVLO 2.5 2.75 3 V VCP rising 5
VCP UVLO Hysteresis VCPUVLOHYS 110 mV 5
Thermal Shutdown Temperature TJTSD 150 165 180 °C Temperature increasing 5
Thermal Shutdown Hysteresis ΔTJ 20 °C Recovery = TJTSD, ΔTJ 5
Logic Input Current (SPD, FG) IIN -5 1 5 µA VIN = 0 to 5.5 V 5
Logic Input Low Level VIL 0 0.8 V 5
Logic Input High Level VIH 2 5.5 V 5
Logic Input Hysteresis VHYS 200 300 600 mV 5
Output Saturation Voltage (FG, RD) VSAT 0.3 V I = 5 mA 5
Output Leakage IOUT 5 µA V = 5.5 V, switch OFF 5
SCL Clock Frequency fCLK 3 400 kHz 5
Bus Free-Time Between Stop/Start tBUF 1.3 μs 5
Hold Time Start Condition tHD:STA 0.6 μs 5
Setup Time for Start Condition tSU:STA 0.6 μs 5
SCL Low Time tLOW 1.3 μs 5
SCL High Time tHIGH 0.6 μs 5
Data Setup Time tSU:DAT 100 ns 5
Data Hold Time tHD:DAT 0 900 ns 5
Setup Time for Stop Condition tSU:STO 0.6 µs 5
Supply Voltage VBB -0.7 40 V 2
Logic Input Voltage Range VIN -0.3 6 V SPD 2
Logic Output VO -0.3 6 V FG, nFAULT, TEST 2
Output Current IOUT 3.6 A 2
Output Voltage VOUT 1 V OUTA, OUTB, OUTC; printed as VBB + 1 V 2
Junction Temperature TJ 150 °C 2
Storage Temperature Range Tstg -55 150 °C 2
Operating Temperature Range TA -40 125 °C Range K 2
Package Thermal Resistance RθJA 34 °C/W 20-lead TSSOP (package LP), on 2-sided PCB 1-in.2 copper 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper Package Thermal Resistance RθJA 20-lead TSSOP (package LP), on 2-sided PCB 1-in.2 copper 34 °C/W 2

CAD (KiCad official)

  • Symbol: A5947KLPTR-B-T
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: TSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: a5947klptr-b-t-etched.step / a5947klptr-b-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); a5947klptr-b-t.step / a5947klptr-b-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allegro MicroSystems, LLC datasheet (21 pp, sha256 f431be2f67e7d90a, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF