component
A4955KLPTR-T
Public Made by Adomby adom
Allegro MicroSystems, LLC Gate Drive ICs, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "a4955klptr-t",
"title": "A4955KLPTR-T",
"brief": "Allegro MicroSystems, LLC Gate Drive ICs, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"power management ics",
"a4955klptr-t",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "A4955KLPTR-T",
"manufacturer": "Allegro MicroSystems, LLC",
"package": "HTSSOP-20-EP",
"pin_count": 21,
"category": "Power Management ICs",
"subcategory": "Gate Drive ICs",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/2df57e4eb9ecc0e57c0e5a9bebd95c11.pdf",
"parts": {
"symbol": "a4955klptr-t.kicad_sym",
"footprint": "a4955klptr-t.kicad_mod",
"model_3d": "a4955klptr-t-hero.glb",
"model_3d_plain": "a4955klptr-t-etched.glb",
"model_3d_step": "a4955klptr-t-etched.step",
"model_3d_step_plain": "a4955klptr-t.step",
"lbr": "a4955klptr-t.lbr"
},
"distributor_links": {
"lcsc": "C2688271",
"digikey": "620-1771-2-ND",
"mouser": "250-A4955KLPTR-T"
},
"distributor_check": {
"checked_at": "2026-10-30T18:43:01Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "620-1771-2-ND",
"status": "found",
"lifecycle": "Not For New Designs"
},
"mouser": {
"pn": "250-A4955KLPTR-T",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "GND",
"type": "power_in",
"description": "Ground terminal for the device."
},
{
"number": "2",
"name": "AIOUT",
"type": "output",
"description": "Analog output proportional to VSENSE, with AIOUT/VSENSE gain of 9 to 11 V/V (10 typical) for VSENSE = 50 to 200 mV."
},
{
"number": "3",
"name": "OCLn",
"type": "output",
"description": "Overcurrent and overvoltage flag, open-drain output driven low during current limiting or a VDS fault, with output voltage of 0.3 V max at 2 mA when overcurrent is detected."
},
{
"number": "4",
"name": "VREF",
"type": "power_in",
"description": "Analog overcurrent-protection reference input with a range of 0 to 2.5 V."
},
{
"number": "5",
"name": "IN2",
"type": "input",
"description": "Digital logic input IN2 with VIH minimum 2.0 V, VIL maximum 0.8 V, and internal pull-down of 30 to 70 kΩ."
},
{
"number": "6",
"name": "IN1",
"type": "input",
"description": "Digital logic input IN1 with VIH minimum 2.0 V, VIL maximum 0.8 V, and internal pull-down of 30 to 70 kΩ."
},
{
"number": "7",
"name": "RC",
"type": "passive",
"description": "Terminal to set blank-time and off-time through a resistor and capacitor to ground, with RRC of 12 to 100 kΩ and CRC of 470 to 1500 pF."
},
{
"number": "8",
"name": "ISET",
"type": "passive",
"description": "Terminal to set gate drive current through a resistor to ground, which should be between 15 and 150 kΩ."
},
{
"number": "9",
"name": "SLEEPn",
"type": "input",
"description": "Active-low sleep input, with VIL(SLEEPn) maximum of 0.4 V; driving it low activates standby mode."
},
{
"number": "10",
"name": "SENSE",
"type": "passive",
"description": "Sense resistor connection and low-side gate return, with absolute maximum range of -0.5 to 0.5 V (-4 to 4 V for tW < 500 ns)."
},
{
"number": "11",
"name": "GLB",
"type": "output",
"description": "Low-side gate drive output for the B-side external MOSFET, with VGL of 6.5 to 7.5 V (6.8 V typical) at VBB = 8 to 50 V."
},
{
"number": "12",
"name": "GLA",
"type": "output",
"description": "Low-side gate drive output for the A-side external MOSFET, with VGL of 6.5 to 7.5 V (6.8 V typical) at VBB = 8 to 50 V."
},
{
"number": "13",
"name": "GHB",
"type": "output",
"description": "High-side gate drive output for the B-side external MOSFET, with VGH of 6.5 to 7.5 V relative to VBB at VBB = 8 to 50 V."
},
{
"number": "14",
"name": "SB",
"type": "passive",
"description": "High-side bridge reference for the B half-bridge; the absolute rating for VSx - VSENSE is -2 to 52 V."
},
{
"number": "15",
"name": "GHA",
"type": "output",
"description": "High-side gate drive output for the A-side external MOSFET, with VGH of 6.5 to 7.5 V relative to VBB at VBB = 8 to 50 V."
},
{
"number": "16",
"name": "SA",
"type": "passive",
"description": "High-side bridge reference for the A half-bridge; the absolute rating for VSx - VSENSE is -2 to 52 V."
},
{
"number": "17",
"name": "VCP",
"type": "power_out",
"description": "Charge pump reservoir capacitor connection, which is internally monitored, with outputs disabled on a VCP fault."
},
{
"number": "18",
"name": "CP2",
"type": "passive",
"description": "Charge pump terminal."
},
{
"number": "19",
"name": "VBB",
"type": "power_in",
"description": "Load supply voltage with absolute maximum of 50 V and UVLO enable threshold of 5.10 to 5.40 V (VBB rising)."
},
{
"number": "20",
"name": "CP1",
"type": "passive",
"description": "Charge pump terminal."
},
{
"number": "21",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package mapping: the hint 'HTSSOP-20-EP' is not the datasheet's term. The MPN suffix LP is the 20-le; The exposed thermal pad (PAD) is listed in the terminal table with no pin number ('–'), so it is exc; Status: the A4955KLPTR-T is marked NOT FOR NEW DESIGN (page 2 footnote 1; production, samples no lon",
"exposed pad 21 added from the footprint"
],
"pages_sent": 11,
"cost_usd": 0.0621,
"at": "2026-10-30T18:42:43"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/2df57e4eb9ecc0e57c0e5a9bebd95c11.pdf",
"pages": 11,
"sha256": "6d475e85d5bccd9d",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 21,
"described": 21,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "a4955klptr-t.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.41,
6.5,
1.2
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "66d1aca7d20d3719375e8c9ad3cc7d683051069892f83de69ec29ddf9b78ee63",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "a4955klptr-t-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.41,
6.5,
1.2
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "eff74c3dc5416fd4937e6238825f5b19d4cf67d2b98ca5c230c8d3d8a110a805",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "LP",
"source_page": 10,
"D": {
"nom_mm": 6.5,
"range_mm": [
null,
null
]
},
"E1": {
"nom_mm": 4.4,
"range_mm": [
null,
null
]
},
"E": {
"nom_mm": 6.4,
"range_mm": [
null,
null
]
},
"e": {
"nom_mm": 0.65,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 1.2,
"range_mm": [
null,
1.2
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "a4955klptr-t.step",
"verdict": "PASS",
"reasons": [
"height and body within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
},
"metadata": {
"specs": {
"Manufacturer": "Allegro MicroSystems, LLC",
"Package": "HTSSOP-20-EP",
"Category": "Power Management ICs",
"Pins": "21"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "6d475e85d5bccd9d6ebb3acfc188f94d46265c424c012b82949e96fa0a55e98c",
"rows": [
{
"name": "Load Supply Voltage",
"symbol": "VBB",
"kind": "absolute_maximum",
"unit": "V",
"min": null,
"typ": null,
"max": 50,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Motor Outputs",
"symbol": "VSx",
"kind": "absolute_maximum",
"unit": "V",
"min": -2,
"typ": null,
"max": 52,
"conditions": "VSx – VSENSE; VBB – VSx",
"source_page": 2,
"source": "datasheet"
},
{
"name": "SENSE",
"symbol": "VSENSE",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.5,
"typ": null,
"max": 0.5,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "SENSE",
"symbol": "VSENSE",
"kind": "absolute_maximum",
"unit": "V",
"min": -4,
"typ": null,
"max": 4,
"conditions": "tW < 500 ns",
"source_page": 2,
"source": "datasheet"
},
{
"name": "OCLn",
"symbol": "VOCLn",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 5.5,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "VREF",
"symbol": "VREF",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 5.5,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "ISET",
"symbol": "VISET",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 5.5,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "AIOUT",
"symbol": "VAIOUT",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 5.5,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Logic Input Voltage Range",
"symbol": "VIN",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 5.5,
"conditions": "SLEEPn, IN1, IN2",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Junction Temperature",
"symbol": "TJ",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Storage Temperature Range",
"symbol": "TS",
"kind": "absolute_maximum",
"unit": "°C",
"min": -55,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Operating Temperature Range",
"symbol": "TA",
"kind": "recommended_operating",
"unit": "°C",
"min": -40,
"typ": null,
"max": 125,
"conditions": "Range K",
"source_page": 2,
"source": "datasheet"
},
{
"name": "VBB Supply Current",
"symbol": "IBB",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 6,
"max": 10,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "VBB Supply Current (standby)",
"symbol": "IBB",
"kind": "electrical",
"unit": "µA",
"min": null,
"typ": null,
"max": 5,
"conditions": "SLEEPn = low, Standby Mode",
"source_page": 4,
"source": "datasheet"
},
{
"name": "High-Side Gate Drive Output",
"symbol": "VGH",
"kind": "electrical",
"unit": "V",
"min": 6.5,
"typ": 6.8,
"max": 7.5,
"conditions": "Relative to VBB, IGATE = 200 µA, VBB = 8 to 50 V",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Low-Side Gate Drive Output",
"symbol": "VGL",
"kind": "electrical",
"unit": "V",
"min": 6.5,
"typ": 6.8,
"max": 7.5,
"conditions": "IGATE = 200 µA, VBB = 8 to 50 V",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Gate Drive Pull-Up Current",
"symbol": "IGPU",
"kind": "electrical",
"unit": "mA",
"min": 21,
"typ": 30,
"max": 39,
"conditions": "RISET = 30 kΩ; VGH = VGL = 4 V",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Gate Drive Pull-Down Current",
"symbol": "IGPD",
"kind": "electrical",
"unit": "mA",
"min": 47,
"typ": 68,
"max": 89,
"conditions": "RISET = 30 kΩ; VGH = VGL = 4 V",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Passive Pull-Down Resistance",
"symbol": "RGPD",
"kind": "electrical",
"unit": "kΩ",
"min": 30,
"typ": 50,
"max": 70,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Logic Output Voltage",
"symbol": "VOCLn",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": 0.2,
"max": 0.3,
"conditions": "I = 2 mA, overcurrent detected",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Logic Output Leakage",
"symbol": "IOCLn",
"kind": "electrical",
"unit": "µA",
"min": null,
"typ": null,
"max": 5,
"conditions": "V = 5 V, normal operation",
"source_page": 4,
"source": "datasheet"
},
{
"name": "PWM Current Limit Flag Timer",
"symbol": "tOCLn",
"kind": "electrical",
"unit": "µs",
"min": 300,
"typ": 500,
"max": 600,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Logic Input Voltage (high)",
"symbol": "VIH",
"kind": "electrical",
"unit": "V",
"min": 2,
"typ": null,
"max": null,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Logic Input Voltage (low)",
"symbol": "VIL",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": null,
"max": 0.8,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Logic Input Voltage (SLEEPn)",
"symbol": "VIL(SLEEPn)",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": null,
"max": 0.4,
"conditions": "SLEEPn input",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Logic Input Pull-Down Resistor",
"symbol": "RPD",
"kind": "electrical",
"unit": "kΩ",
"min": 30,
"typ": 50,
"max": 70,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "VREF Input Current",
"symbol": "IVREF",
"kind": "electrical",
"unit": "µA",
"min": -5,
"typ": null,
"max": 5,
"conditions": "VREF = 2.5 V",
"source_page": 4,
"source": "datasheet"
},
{
"name": "VREF Input Range",
"symbol": "VREF",
"kind": "electrical",
"unit": "V",
"min": 0,
"typ": null,
"max": 2.5,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Current Gain",
"symbol": "AV",
"kind": "electrical",
"unit": "V/V",
"min": 9.5,
"typ": null,
"max": 10.5,
"conditions": "VREF / VSENSE, VREF = 2.5 V",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Input Offset, SENSE",
"symbol": "VOSSENSE",
"kind": "electrical",
"unit": "mV",
"min": -10,
"typ": null,
"max": 10,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Blank-Time",
"symbol": "tBLK",
"kind": "electrical",
"unit": "µs",
"min": 2.1,
"typ": 3,
"max": 3.9,
"conditions": "RRC = 30 kΩ, CRC = 1 nF",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Power-Up Delay",
"symbol": "tpu",
"kind": "electrical",
"unit": "µs",
"min": null,
"typ": 50,
"max": 300,
"conditions": "Time until outputs are enabled",
"source_page": 4,
"source": "datasheet"
},
{
"name": "AIOUT Gain",
"symbol": "AIOUT",
"kind": "electrical",
"unit": "V/V",
"min": 9,
"typ": 10,
"max": 11,
"conditions": "AIOUT/VSENSE, VSENSE = 50 to 200 mV",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Input Offset, AIOUT",
"symbol": "VOSAIOUT",
"kind": "electrical",
"unit": "mV",
"min": -15,
"typ": null,
"max": 15,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Sample-and-Hold Droop Rate",
"symbol": "VDROOP",
"kind": "electrical",
"unit": "mV/µs",
"min": null,
"typ": null,
"max": 1,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "AIOUT Output Impedance",
"symbol": "ROUT(AIOUT)",
"kind": "electrical",
"unit": "kΩ",
"min": 0.75,
"typ": 1,
"max": 1.45,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "UVLO Enable Threshold",
"symbol": "VBB(UVLO)",
"kind": "electrical",
"unit": "V",
"min": 5.1,
"typ": 5.25,
"max": 5.4,
"conditions": "VBB rising",
"source_page": 4,
"source": "datasheet"
},
{
"name": "UVLO Hysteresis",
"symbol": "VBB(UVLO,HYS)",
"kind": "electrical",
"unit": "mV",
"min": 200,
"typ": 300,
"max": 350,
"conditions": "",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Thermal Shutdown Temperature",
"symbol": "TJTSD",
"kind": "electrical",
"unit": "°C",
"min": 150,
"typ": 165,
"max": 185,
"conditions": "Temperature increasing",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Thermal Resistance, junction to ambient (LP package)",
"symbol": "RθJA",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 28,
"max": null,
"conditions": "4-Layer PCB, 1 in.2 copper",
"source_page": 2,
"source": "datasheet"
}
]
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"a4955klptr-t"
],
"discovery_pitch": "A4955KLPTR-T (Allegro MicroSystems, LLC) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"a4955klptr-t.kicad_sym",
"a4955klptr-t.kicad_mod",
"a4955klptr-t.glb",
"a4955klptr-t.step",
"a4955klptr-t.lbr",
"docs/hero.png",
"docs/a4955klptr-t-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"a4955klptr-t-hero.glb",
"a4955klptr-t-hero.overlay.json",
"a4955klptr-t-etched.glb"
],
"visibility": {
"public": true
}
}