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A4952ELYTR-T

Allegro MicroSystems, LLC · Motor Driver ICs · MSOP-10-EP

A4952ELYTR-T from Allegro MicroSystems, LLC, in a MSOP-10-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FLTn output Open-drain active-low fault output that goes low when an overcurrent fault is detected, with VRST at most 0.5 V at IOUT = 1 mA and leakage at most 1 µA with no fault.
2 RTRY input Retry input that selects the overcurrent response: tied to GND gives a 2-ms automatic retry, left open latches the fault, and VRTRY must be at most 200 mV when valid.
3 IN2 input Logic input 2 controlling the full bridge, with VIN(1) at least 2.0 V, VIN(0) at most 0.8 V and an absolute range of -0.3 to 6 V.
4 IN1 input Logic input 1 controlling the full bridge, with VIN(1) at least 2.0 V, VIN(0) at most 0.8 V and an absolute range of -0.3 to 6 V.
5 VREF power_in Analog input that sets the current limit, with an operating range of 0 to 5 V and an absolute range of -0.3 to 6 V.
6 VBB power_in Load supply voltage with an operating range of 8 to 40 V and an absolute maximum of 40 V; the UVLO enable threshold is 7.5 V typical.
7 OUT1 output DMOS full-bridge output 1, rated for motor outputs voltage of -2 to 42 V and output current of 2 A at 100% duty cycle.
8 LSS passive Power return and sense resistor connection, where the sense voltage must stay within an absolute range of -0.5 to 0.5 V.
9 OUT2 output DMOS full-bridge output 2, rated for motor outputs voltage of -2 to 42 V and output current of 2 A at 100% duty cycle.
10 GND power_in Ground connection for the device, where the copper ground plane under the exposed pad is recommended as the star ground point.
11 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Allegro MicroSystems, LLC
Package MSOP-10-EP
Category Power Management ICs
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Load Supply Voltage VBB 40 V 2
Logic I/O Voltage Range VIN -0.3 6 V 2
FLTn Sink Current IFLTN 10 mA 2
VREF Input Voltage Range VREF -0.3 6 V 2
Sense Voltage (LSS pin) VS -0.5 0.5 V 2
Motor Outputs Voltage VOUT -2 42 V 2
Output Current IOUT 2 A Duty cycle = 100% 2
Transient Output Current iOUT 6 A TW < 500 ns 2
Operating Temperature Range TA -40 85 °C Temperature Range E 2
Maximum Junction Temperature TJ(max) 150 °C 2
Storage Temperature Range Tstg -55 150 °C 2
Load Supply Voltage Range VBB 8 40 V 3
Total RDS(on) RDS(on) 0.8 1 Ω IOUT = /1.5 A/, TJ = 25°C 3
Total RDS(on) RDS(on) 1.3 1.6 Ω IOUT = /1.5 A/, TJ = 125°C 3
Low Power Standby Load Supply Current IBB 10 µA Low Power Standby mode 3
Body Diode Forward Voltage, source diode Vf 1.5 V Source diode, If = -1.5 A 3
Body Diode Forward Voltage, sink diode Vf 1.5 V Sink diode, If = 1.5 A 3
Logic Input Voltage High VIN(1) 2 V INx pins 3
Logic Input Voltage Low VIN(0) 0.8 V INx pins 3
Logic Input Voltage in Standby VIN(STANDBY) 0.4 V INx pins, Low Power Standby mode 3
Logic Input Current High IIN(1) 40 100 µA INx pins, VIN = 2.0 V 3
Logic Input Current Low IIN(0) 16 40 µA INx pins, VIN = 0.8 V 3
Input Hysteresis VHYS 250 550 mV 3
Retry Input Voltage VRTRY 200 mV RTRY pin = valid 3
Fault Output Voltage VRST 0.5 V FLTn pin, IOUT = 1 mA 3
Fault Output Leakage Current ILK 1 µA FLTn pin, no fault, pull-up to 5 V 3
Crossover Delay tCOD 50 400 500 ns 3
VREF Input Voltage Range VREF 0 5 V 3
Current Gain AV 9.5 10.5 V/V VREF / ISS, VREF = 5 V 3
Current Gain AV 9 10 V/V VREF / ISS, VREF = 2.5 V 3
Current Gain AV 8 10 V/V VREF / ISS, VREF = 1 V 3
Blank Time tBLANK 2 3 4 µs 3
Constant Off-Time toff 16 25 34 µs 3
Standby Timer tst 1 1.5 ms IN1 = IN2 < VIN(STANDBY) 3
Power-Up Delay tpu 30 µs 3
UVLO Enable Threshold VBBUVLO 7 7.5 7.95 V VBB increasing 3
UVLO Hysteresis VBBUVLOhys 500 mV 3
Thermal Shutdown Temperature TJTSD 160 °C Temperature increasing 3
Thermal Shutdown Hysteresis TTSDhys 20 °C Recovery = TJTSD, TTSDhys 3
Overcurrent Protection Limit IOCP 2.5 6.5 A 3
Overcurrent Protection Pulse Width tOCP 1 4 µs 3
Package Thermal Resistance, LY on 4-layer PCB RθJA 48 ºC/W LY package, on 4-layer PCB based on JEDEC standard 2
Package Thermal Resistance, LY on 2-layer PCB (estimate) RθJA 60 ºC/W LY package, (estimate) on 2-layer PCB with 1 in2. 2-oz. copper each side 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-pin SOICN package (suffix LJ). Both packages have an exposed thermal pad, and are lead (Pb) free, with 100% matte tin 1

CAD (KiCad official)

  • Symbol: A4952ELYTR-T
  • Footprint: Package_SO:MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm
  • 3D model: MSOP-10-EP (KiCad packages3D, STEP)
  • 3D model files: a4952elytr-t-etched.step / a4952elytr-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); a4952elytr-t.step / a4952elytr-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allegro MicroSystems, LLC datasheet (11 pp, sha256 b39efad36b5f408e, retrieved 2026-11-02, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF