component
A3930KJPTR-T
Public Made by Adomby adom
Allegro MicroSystems LLC Brushless DC (BLDC) Motor Driver, LQFP-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
a3930kjptr-t: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
2 files changed
+105−25
package.json+63−23@@ -59,7 +59,7 @@ "number": "2", "name": "RESET", "type": "input",- "description": "Sleep mode control input; when low disables all circuits and draws \u226410 \u00b5A; input high threshold 2.2 V with 50 k\u03a9 internal pull-down."+ "description": "Sleep mode control input; when low disables all circuits and draws ≤10 µA; input high threshold 2.2 V with 50 kΩ internal pull-down." }, { "number": "3",@@ -71,7 +71,7 @@ "number": "4", "name": "V5", "type": "power_out",- "description": "5V reference output (4.75 to 5.25 V); powers Hall pull-ups and logic; requires \u2265200 nF decoupling to AGND."+ "description": "5V reference output (4.75 to 5.25 V); powers Hall pull-ups and logic; requires ≥200 nF decoupling to AGND." }, { "number": "5",@@ -89,7 +89,7 @@ "number": "7", "name": "TACHO", "type": "output",- "description": "Tachometer output toggling at each motor commutation; VOH = V5 - 1 V typical, VOL \u22640.4 V."+ "description": "Tachometer output toggling at each motor commutation; VOH = V5 - 1 V typical, VOL ≤0.4 V." }, { "number": "8",@@ -101,25 +101,25 @@ "number": "9", "name": "DIR", "type": "input",- "description": "Direction control input (VIL \u22640.8 V, VIH \u22652 V); high for forward, low for reverse per Hall commutation sequence."+ "description": "Direction control input (VIL ≤0.8 V, VIH ≥2 V); high for forward, low for reverse per Hall commutation sequence." }, { "number": "10", "name": "H1", "type": "input",- "description": "Hall sensor input with 100 k\u03a9 pull-up to V5 and 500 mV hysteresis; 120\u00b0 electrical spacing with internal filtering."+ "description": "Hall sensor input with 100 kΩ pull-up to V5 and 500 mV hysteresis; 120° electrical spacing with internal filtering." }, { "number": "11", "name": "H2", "type": "input",- "description": "Hall sensor input with 100 k\u03a9 pull-up to V5 and 500 mV hysteresis; 120\u00b0 electrical spacing with internal filtering."+ "description": "Hall sensor input with 100 kΩ pull-up to V5 and 500 mV hysteresis; 120° electrical spacing with internal filtering." }, { "number": "12", "name": "H3", "type": "input",- "description": "Hall sensor input with 100 k\u03a9 pull-up to V5 and 500 mV hysteresis; 120\u00b0 electrical spacing with internal filtering."+ "description": "Hall sensor input with 100 kΩ pull-up to V5 and 500 mV hysteresis; 120° electrical spacing with internal filtering." }, { "number": "13",@@ -143,7 +143,7 @@ "number": "16", "name": "RC", "type": "input",- "description": "Oscillator timing input; fOSC \u22481/(RT\u00d7CT + tBLANK + tDEAD) with RT=5 to 400 k\u03a9; pull to AGND to disable PWM."+ "description": "Oscillator timing input; fOSC ≈1/(RT×CT + tBLANK + tDEAD) with RT=5 to 400 kΩ; pull to AGND to disable PWM." }, { "number": "17",@@ -155,31 +155,31 @@ "number": "18", "name": "RDEAD", "type": "input",- "description": "Dead time resistor connection; RDEAD (10 to 100 k\u03a9 optimal) sets cross-conduction protection delay tDEAD."+ "description": "Dead time resistor connection; RDEAD (10 to 100 kΩ optimal) sets cross-conduction protection delay tDEAD." }, { "number": "19", "name": "CSOUT", "type": "output",- "description": "Current sense amplifier output; VCSOUT \u2248VOOS + 19\u00d7(CSP - CSN), output range 0.1 to V5 - 0.2 V, output impedance ~80 \u03a9."+ "description": "Current sense amplifier output; VCSOUT ≈VOOS + 19×(CSP - CSN), output range 0.1 to V5 - 0.2 V, output impedance ~80 Ω." }, { "number": "20", "name": "REF", "type": "input",- "description": "Current limit reference input; clamped internally to 4 V; typical pull-up RREF = 20 to 200 k\u03a9 to V5."+ "description": "Current limit reference input; clamped internally to 4 V; typical pull-up RREF = 20 to 200 kΩ to V5." }, { "number": "21", "name": "CSN", "type": "input",- "description": "Differential amplifier inverting input; connect to negative terminal of current sense resistor; input impedance ~4 k\u03a9."+ "description": "Differential amplifier inverting input; connect to negative terminal of current sense resistor; input impedance ~4 kΩ." }, { "number": "22", "name": "CSP", "type": "input",- "description": "Differential amplifier non-inverting input; connect to positive terminal of current sense resistor; input impedance ~80 k\u03a9."+ "description": "Differential amplifier non-inverting input; connect to positive terminal of current sense resistor; input impedance ~80 kΩ." }, { "number": "23",@@ -203,7 +203,7 @@ "number": "26", "name": "GHC", "type": "output",- "description": "High-side gate driver output for phase C; driven from bootstrap capacitor CC; output on-resistance ~4 \u03a9 typical."+ "description": "High-side gate driver output for phase C; driven from bootstrap capacitor CC; output on-resistance ~4 Ω typical." }, { "number": "27",@@ -221,7 +221,7 @@ "number": "29", "name": "GHB", "type": "output",- "description": "High-side gate driver output for phase B; driven from bootstrap capacitor CB; output on-resistance ~4 \u03a9 typical."+ "description": "High-side gate driver output for phase B; driven from bootstrap capacitor CB; output on-resistance ~4 Ω typical." }, { "number": "30",@@ -239,7 +239,7 @@ "number": "32", "name": "GHA", "type": "output",- "description": "High-side gate driver output for phase A; driven from bootstrap capacitor CA; output on-resistance ~4 \u03a9 typical."+ "description": "High-side gate driver output for phase A; driven from bootstrap capacitor CA; output on-resistance ~4 Ω typical." }, { "number": "33",@@ -251,19 +251,19 @@ "number": "34", "name": "GLC", "type": "output",- "description": "Low-side gate driver output for phase C; logic level output VOH = VREG - 0.2 V typical, VOL \u22640.4 V; pull-down impedance ~1.5 \u03a9."+ "description": "Low-side gate driver output for phase C; logic level output VOH = VREG - 0.2 V typical, VOL ≤0.4 V; pull-down impedance ~1.5 Ω." }, { "number": "35", "name": "GLB", "type": "output",- "description": "Low-side gate driver output for phase B; logic level output VOH = VREG - 0.2 V typical, VOL \u22640.4 V; pull-down impedance ~1.5 \u03a9."+ "description": "Low-side gate driver output for phase B; logic level output VOH = VREG - 0.2 V typical, VOL ≤0.4 V; pull-down impedance ~1.5 Ω." }, { "number": "36", "name": "GLA", "type": "output",- "description": "Low-side gate driver output for phase A; logic level output VOH = VREG - 0.2 V typical, VOL \u22640.4 V; pull-down impedance ~1.5 \u03a9."+ "description": "Low-side gate driver output for phase A; logic level output VOH = VREG - 0.2 V typical, VOL ≤0.4 V; pull-down impedance ~1.5 Ω." }, { "number": "37",@@ -287,7 +287,7 @@ "number": "40", "name": "VREG", "type": "power_out",- "description": "Gate driver supply output from internal charge pump (~13 V nominal); supplies all gate drivers and bootstrap charging; requires \u226520 \u00b5F storage capacitor."+ "description": "Gate driver supply output from internal charge pump (~13 V nominal); supplies all gate drivers and bootstrap charging; requires ≥20 µF storage capacitor." }, { "number": "41",@@ -317,7 +317,7 @@ "number": "45", "name": "VBB", "type": "power_in",- "description": "Main power supply input; operating range 5.5 to 50 V (guaranteed function 7 to 45 V); quiescent current 11 to 14 mA; requires 100 nF + 10 \u00b5F parallel decoupling."+ "description": "Main power supply input; operating range 5.5 to 50 V (guaranteed function 7 to 45 V); quiescent current 11 to 14 mA; requires 100 nF + 10 µF parallel decoupling." }, { "number": "46",@@ -379,6 +379,46 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "a3930kjptr-t.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9.32,+ 9.32,+ 1.6+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "f960910b71d80cee36ddda3bc3d76fc6db6e160cef6b65cca7a6d6ec3727584e",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "a3930kjptr-t-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9.32,+ 9.32,+ 1.6+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "89038f73af851ba4d8dd1a6661bdb376d0c77d41e0d81e8b9a0bb330ac00fd00",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }-}+}
page.json+42−2@@ -364,7 +364,47 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "a3930kjptr-t.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9.32,+ 9.32,+ 1.6+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "f960910b71d80cee36ddda3bc3d76fc6db6e160cef6b65cca7a6d6ec3727584e",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "a3930kjptr-t-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9.32,+ 9.32,+ 1.6+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "89038f73af851ba4d8dd1a6661bdb376d0c77d41e0d81e8b9a0bb330ac00fd00",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }, "metadata": { "specs": {@@ -412,4 +452,4 @@ "public": true }, "updated_at": "2026-09-24T15:27:19.408Z"-}+}